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PDF LTC3866 Data sheet ( Hoja de datos )
| Número de pieza | LTC3866 | |
| Descripción | Current Mode Synchronous Controller | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC3866
Current Mode Synchronous
Controller for Sub Milliohm
DCR Sensing
FEATURES
DESCRIPTION
n Sub Milliohm DCR Current Sensing
n High Efficiency: Up to 95%
n Selectable Current Sensing Limit
n Programmable DCR Temperature Compensation
n Die Overtemperature Thermal Shutdown
n ± 0.5% 0.6V Output Voltage Accuracy
n Programmable Fixed Frequency 250kHz to 770kHz
n High Speed Differential Remote Sense Amplifier
n Wide Input Voltage Range: 4.5V to 38V
n Output Voltage Range: 0.6V to 3.5V with Diffamp
n Adjustable Soft-Start or Output Voltage Tracking
n Foldback Output Current Limit
n Short-Circuit Soft Recovery
n Output Overvoltage Protection
n 24-Lead (4mm × 4mm) QFN and 24-Lead FE Packages
APPLICATIONS
n Computer Systems
n Telecom Systems
n Industrial and Medical Instruments
n DC Power Distribution Systems
The LTC®3866 is a single phase current mode synchronous
step-down switching regulator controller that drives all
N-channel power MOSFET switches. It employs a unique
architecture which enhances the signal-to-noise ratio of
the current sense signal, allowing the use of a very low
DC resistance power inductor to maximize the efficiency
in high current applications. This feature also reduces the
switching jitter commonly found in low DCR applications.
The LTC3866 also includes a high speed remote sense dif-
ferential amplifier, a programmable current sense limit that
can be selected to 10mV, 15mV, 20mV, 25mV or 30mV,
and DCR temperature compensation to limit the maximum
output current precisely over temperature.
The LTC3866 also features a precise 0.6V reference with a
guaranteed limit of ±0.5% that provides an accurate output
voltage from 0.6V to 3.5V. A 4.5V to 38V input voltage
range allows it to support a wide variety of bus voltages
and various types of batteries.
The LTC3866 is offered in a low profile 24-lead 4mm ×
4mm QFN and 24-lead exposed pad FE packages.
L, LT, LTC, LTM, Burst Mode, OPTI-LOOP, Linear Technology and the Linear logo are
registered trademarks and No RSENSE is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents, including
5481178, 5705919, 5929620, 6177787, 6580258, 6498466, 6611131, patent pending.
TYPICAL APPLICATION
High Efficiency, 1.5V/30A Step-Down Converter with Very Low DCR Sensing
220pF
30.1k
20k
10k
1.5nF
100k
0.1µF
C1
220nF
C2
220nF
FREQ MODE/PLLIN
RUN PGOOD
TK/SS
ITEMP
ITH EXTVCC
VFB LTC3866 VIN
DIFFOUT
INTVCC
DIFFP
BOOST
DIFFN
TG
SNSD+
SW
SNS–
BG
SNSA+
PGND
ILIM CLKOUT
SGND
4.7µF
VIN
220µF 4.5V TO 20V
0.1µF
0.33µH
DCR = 0.32mΩ
R2
931Ω
R1
4.64k
COUT
470µF
×2
VOUT
1.5V
30A
3866 TA01a
Efficiency vs Load Current
and Mode
100
90
80
70
60
50
40
30
20
10
0
0.01
VIN = 12V
VOUT = 1.5V
L = 0.33µH
(DCR = 0.32mΩ TYP)
CCM
PULSE SKIPPING
Burst Mode
OPERATION
0.1 1
10
LOAD CURRENT (A)
100
3866 TA01b
3866fb
1
1 page  
LTC3866
E LECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 15V, VRUN = 5V unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
On-Chip Driver
TG RUP
TG RDOWN
BG RUP
BG RDOWN
TG Pull-Up RDS(ON)
TG Pull-Down RDS(ON)
BG Pull-Up RDS(ON)
BG Pull-Down RDS(ON)
TG High
TG Low
BG High
BG Low
2.6 Ω
1.5 Ω
2.4 Ω
1.1 Ω
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3866 is tested under pulsed load conditions such that
TJ ≈ TA. The LTC3866E is guaranteed to meet performance specifications
from 0°C to 85°C operating junction temperature. Specifications over
the –40°C to 125°C operating junction temperature range are assured by
design, characterization and correlation with statistical process controls.
The LTC3866I is guaranteed to meet performance specifications over the
full –40°C to 125°C operating junction temperature range. The maximum
ambient temperature consistent with these specifications is determined
by specific operating conditions in conjunction with board layout, the
package thermal impedance and other environmental factors.
Note 3: The junction temperature, TJ, is calculated from the ambient
temperature, TA, and power dissipation, PD, according to the following
formula:
LTC3866FE: TJ = TA + (PD • 33°C/W)
LTC3866UF: TJ = TA + (PD • 47°C/W)
Note 4: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the absolute maximum operating junction
temperature may impair device reliability or permanently damage the
device.
Note 5: The LTC3866 is tested in a feedback loop that servos VITH to a
specified voltage and measures the resultant VFB.
Note 6: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 7: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured using 50% levels.
Note 8: The minimum on-time condition corresponds to the on inductor
peak-to-peak ripple current ≥40% of IMAX (see Minimum On-Time
Considerations in the Applications Information section).
Note 9: Guaranteed by design.
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Efficiency vs Load Current
and Mode
100
90
80
70
60
50
40
30
20
10
0
0.01
VIN = 4.5V
VOUT = 1.5V
L = 0.33µH
(DCR = 0.32mΩ TYP)
FRONT PAGE CIRCUIT
CCM
PULSE SKIPPING
Burst Mode
OPERATION
0.1 1
10
LOAD CURRENT (A)
100
3866 G01
Efficiency vs Load Current
and Mode
100
90
80
70
60
50
40
30
20
10
0
0.01
VIN = 12V
VOUT = 1.5V
L = 0.33µH
(DCR = 0.32mΩ TYP)
FRONT PAGE CIRCUIT
CCM
PULSE SKIPPING
Burst Mode
OPERATION
0.1 1
10
LOAD CURRENT (A)
100
3866 G02
Efficiency and Power Loss
vs Load Current
95
94
93
92
VIN = 20V
VOUT = 1.5V
FRONT PAGE CIRCUIT
91
90
89
EFFICIENCY
88
87
86
85
84
POWER LOSS
83
82
81
80
0 5 10 15 20 25
LOAD CURRENT (A)
15
10
5
0
30 35
3866 G03
3866fb
5
5 Page 
LTC3866
OPERATION
Main Control Loop
The LTC3866 uses LTC proprietary current sensing, current
mode step-down architecture. During normal operation, the
top MOSFET is turned on every cycle when the oscillator
sets the RS latch, and turned off when the main current
comparator, ICMP , resets the RS latch. The peak inductor
current at which ICMP resets the RS latch is controlled
by the voltage on the ITH pin, which is the output of the
error amplifier, EA. The remote sense amplifier (diffamp)
produces a signal equal to the differential voltage sensed
across the output capacitor divided down by the feedback
divider and re-references it to the local IC groundreference.
The VFB pin receives this feedback signal and compares
it to the internal 0.6V reference. When the load current
increases, it causes a slight decrease in the VFB pin voltage
relative to the 0.6V reference, which in turn causes the
ITH voltage to increase until the inductor’s average current
equals the new load current. After the top MOSFET has
turned off, the bottom MOSFET is turned on until either
the inductor current starts to reverse, as indicated by the
reverse current comparator, IREV , or the beginning of the
next cycle.
The main control loop is shut down by pulling the RUN
pin low. Releasing RUN allows an internal 1.0µA current
source to pull up the RUN pin. When the RUN pin reaches
1.22V, the main control loop is enabled and the IC is
powered up. When the RUN pin is low, all functions are
kept in a controlled state.
Sensing Signal of Very Low DCR
The LTC3866 employs a unique architecture to enhance
the signal-to-noise ratio that enables it to operate with a
small sense signal of a very low value inductor DCR, 1mΩ
or less, to improve power efficiency, and reduce jitter due
to the switching noise which could corrupt the signal. The
LTC3866 can sense a DCR value as low as 0.2mΩ with
careful PCB layout.The LTC3866 comprises two positive
sense pins, SNSD+ and SNSA+, to acquire signals and
processes them internally to provide the response as
with a DCR sense signal that has a 14dB signal-to-noise
ratio improvement. In the meantime, the current limit
threshold is still a function of the inductor peak current
and its DCR value, and can be accurately set from 10mV
to 30mV in a 5mV steps with the ILIM pin. The filter time
constant, R1C1, of the SNSD+ should match the L/DCR
of the output inductor, while the filter at SNSA+ should
have a bandwidth of five times larger than SNSD+, R2C2
equals R1C1/5.
INTVCC/EXTVCC Power
Power for the top and bottom MOSFET drivers and most
other internal circuitry is derived from the INTVCC pin.
When the EXTVCC pin is left open or tied to a voltage
less than 4.7V, an internal 5.5V linear regulator supplies
INTVCC power from VIN. If EXTVCC is taken above 4.7V,
the 5.5V regulator is turned off and an internal switch is
turned on connecting EXTVCC to INTVCC. Using the EXTVCC
pin allows the INTVCC power to be derived from a high
efficiency external source such as a switching regulator
output. The top MOSFET driver is biased from the floating
bootstrap capacitor, CB, which normally recharges dur-
ing the off cycle through an external diode when the top
MOSFET turns off. If the input voltage, VIN, decreases to
a voltage close to VOUT , the loop may enter dropout and
attempt to turn on the top MOSFET continuously. The
dropout detector detects this and forces the top MOSFET
off for about one-twelfth of the clock period plus 100ns
every third cycle to allow CB to recharge. However, it is
recommended that a load be present or the IC operates
at low frequency during the dropout transition to ensure
CB is recharged.
Internal Soft-Start
By default, the start-up of the output voltage is normally
controlled by an internal soft-start ramp. The internal
soft-start ramp connects to the noninverting input of the
error amplifier. The FB pin is regulated to the lower of the
error amplifier’s three noninverting inputs (the internal
soft-start ramp, the TK/SS pin or the internal 600mV ref-
erence). As the ramp voltage rises from 0V to 0.6V over
approximately 600µs, the output voltage rises smoothly
from its prebiased value to its final set value.
Certain applications can result in the start-up of the con-
verter into a non-zero load voltage, where residual charge
is stored on the output capacitor at the onset of converter
switching. In order to prevent the output from discharging
under these conditions, the bottom MOSFET is disabled
until soft-start is greater than VFB.
3866fb
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LTC3866.PDF ] | |
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