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PDF LT3667 Data sheet ( Hoja de datos )
| Número de pieza | LT3667 | |
| Descripción | 40V 400mA Step-Down Switching Regulator | |
| Fabricantes | Linear Technology Corporation | |
| Logotipo |  |
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1. LT3667  Hay una vista previa y un enlace de descarga de LT3667 (archivo pdf) en la parte inferior de esta página. Total 34 Páginas | ||
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Features
n Triple Output Supply from a Single Input Requires
Only One Inductor
n IQ = 50μA at 12VIN to 5V, 3.3V and 2.5V with No Load
n Buck Regulator:
Low Ripple (<15mVP-P) Burst Mode Operation®
400mA Output with Internal Power Switch
4.3V to 40V Input Operation Range (60V Max)
n Dual Low Dropout Linear Regulators
200mA Outputs with Programmable Current Limits
1.6V to 45V Input Range
Fault Protected to ±45V
n Adjustable 250kHz to 2.2MHz Switching Frequency
n Synchronizable Between 300kHz and 2.2MHz
n Programmable Undervoltage Lockout
n Power Good Indicators
n Available in a Thermally-Enhanced 16-Lead MSOP
and 24-Lead (3mm × 5mm) QFN Packages
Applications
n Automotive Battery Regulation
n Power for Portable Instrumentation
n Industrial Supplies
n Fault-Protected Sensor Supply
LT3667
40V 400mA Step-Down
Switching Regulator with
Dual Fault Protected LDOs
Description
The LT®3667 is a monolithic triple power supply composed
of a 400mA buck switching regulator and two 200mA low
dropout linear regulators (LDOs).
The buck regulator includes a high efficiency switch, a
boost diode, and the necessary oscillator, control and
logic circuitry. Current mode topology is used for fast
transient response and good loop stability. Low ripple
Burst Mode operation maintains high efficiency at low
output currents while keeping output ripple below 15mV
in a typical application.
Each LDO supplies 200mA of output current with a typical
dropout voltage of 340mV, and each LDO has an accurate
resistor programmable current limit.
Internal protection circuitry includes reverse-battery
protection, current limiting, thermal limiting and reverse
current protection.
The LT3667 is available in a thermally-enhanced 16-Lead
MSOP and a 24-Pin 3mm x 5mm QFN package with ex-
posed pad for low thermal resistance.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
Typical Application
VIN
6V TO 40V
TRANSIENT
TO 60V
4.7µF
UVLO1 IN1
BOOST
2.5V
100mA
ON OFF
174k
4.7µF
340k
158k
EN
PG
RT
OUT2
LT3667
SW
DA
FB1
BD
IN2
IN3
OUT3
FB2 FB3
EN2/ILIM2 GND EN3/ILIM3
0.22µF 22µH
931k
22pF
294k
3.3V
499k 100mA
2.2µF
158k
3667 TA01a
5V
22µF 200mA
For more information www.linear.com/LT3667
100
90
80
70
60
50
40
30
20
10
0
5
No-Load Supply Current
10 15 20 25 30
INPUT VOLTAGE (V)
35
3667 TA01b
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1
1 page  
LT3667
E lectrical Characteristics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN1 = 12V unless otherwise noted. (Note 4)
PARAMETER
CONDITIONS
MIN TYP MAX
Reverse Output Current (Note 13)
Input Reverse Leakage Current LDO2
Input Reverse Leakage Current LDO3 (QFN)
Internal Current Limit (Note 12)
Externally Programmed Current Limit
LDO Disable Threshold
VOUT2 = 1.2V, VIN1 = VIN2 = VIN3 = 0V
VOUT3 = 1.2V, VIN1 = VIN2 = VIN3 = 0V
5 40
5 40
VIN2 = –45V, VIN1 = VIN3 = VOUT2 = 0V
VIN3 = –45V, VIN1 = VIN2 = VOUT3 = 0V
l
l
300
300
VIN2 = 2.2V, VOUT2 = 0V, EN2/ILIM2 Pin Grounded
300
∆VOUT2 = –5%
l 220
VIN3 = 2.2V, VOUT3 = 0V, EN3/ILIM3 Pin Grounded
300
∆VOUT3 = –5%
l 220
REN/ILIM = 31.6k, VOUT2/3 = 5V, VIN2/3 ≥ 5.6V
l 9.5
10 10.5
REN/ILIM = 6.19k, VOUT2/3 = 5V, VIN2/3 ≥ 5.6V
l 47 51 55
REN/ILIM = 6.19k, VOUT2/3 = 5V, 5.6V ≤ VIN2/3 ≤ 15V l 48.45 51 53.55
REN/ILIM = 1.54k, VOUT2/3 = 5V, 5.6V ≤ VIN2/3 ≤ 15V l 181 197 215
VEN/ILIM Rising
0.9 1 1.2
UNITS
µA
µA
µA
µA
mA
mA
mA
mA
mA
mA
mA
mA
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Positive currents flow into pins, negative currents flow out of pins.
Minimum and maximum values refer to absolute values.
Note 3: Absolute maximum voltage at the IN1, UVLO1 and EN pins is 60V
for nonrepetitive 1 second transients, and 40V for continuous operation.
Note 4: The LT3667E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the −40°C
to 125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3667I is guaranteed over the full −40°C to 125°C operating junction
temperature range. The LT3667H is guaranteed over the full −40°C to
150°C operating junction temperature range.
Note 5: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
when overtemperature protection is active. Continuous operation above
the specified maximum operating junction temperature may impair device
reliability.
Note 6: This is the voltage necessary to keep the internal bias circuitry in
regulation.
Note 7: Current limit guaranteed by design and/or correlation to static test.
Slope compensation reduces current limit at higher duty cycles.
Note 8: This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the switch.
Note 9: Dropout voltage is the minimum input-to-output voltage
differential needed for an LDO to maintain regulation at a specified output
current. When an LDO is in dropout, its output voltage will be equal to
VIN – VDROP.
Note 10: To satisfy minimum input voltage requirements, the LT3667 is
tested and specified for these conditions with an external resistor divider
(80.6k bottom, 422k top) which sets VOUT to 5V. The external resistor
divider adds 9.93μA of DC load on the output. This external current is not
factored into GND pin current.
Note 11: GND pin current is tested with VIN = VOUT(NOMINAL) + 0.6V and a
current source load. GND pin current increases in dropout.
Note 12: The LT3667 is tested and specified for these conditions with FB2
(FB3) pin connected to the OUT2 (OUT3) pin.
Note 13: Reverse output current is tested with the IN2 (IN3) pin grounded
and the OUT2 (OUT3) pin forced to the rated output voltage. This current
flows into the OUT2 (OUT3) pin and out of the GND pin.
For more information www.linear.com/LT3667
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5 Page 
LT3667
Pin Functions (MSOP/QFN)
SW (Pin 1/Pin 24): The SW pin is the output of the internal
power switch. Connect this pin to the inductor, the catch
diode and the boost capacitor.
BOOST (Pin 2/Pin 1): This pin is used to provide a drive
voltage, higher than the input voltage, to the internal bipolar
NPN power switch of the switching regulator. Connect
a capacitor (typically 0.22μF) between BOOST and SW.
SYNC (Pin 2, QFN Only): This is the external clock syn-
chronization input. Ground this pin for low ripple Burst
Mode operation at low output loads. Tie to a clock source
for synchronization. Refer to Synchronization section in
Applications Information for more details.
EN (Pin 3/Pin 3): The EN pin is used to put the LT3667 in
shutdown mode. Tie to ground to shut down the LT3667.
Tie to 1V or more for normal operation. If the EN pin is to
be pulled below ground, use a series resistor to limit the
pin current to 1mA.
RT (Pin 4/Pin 4): Oscillator Resistor Input. Connect a resis-
tor from this pin to ground to set the switching frequency.
BD (Pin 5, QFN Only): This pin connects to the anode of
the internal boost diode. This pin also supplies current to
the LT3667’s internal regulator when BD is above 3.2V.
OUT3 (Pin 6/Pin 7), OUT2 (Pin 10/Pin 14): These are the
outputs of the two LDOs. Stability requirements demand
a minimum 2.2μF ceramic output capacitor to prevent
oscillations.
FB3 (Pin 7/Pin 8), FB2 (Pin 9/Pin 13): The two LDOs of
the LT3667 regulate the FB2 and FB3 pins to 0.8V. Connect
the feedback resistor divider taps to these pins.
FB1 (Pin 8/Pin 10): The switching regulator of the LT3667
regulates the FB1 pin to 1.2V. Connect the feedback resis-
tor divider tap to this pin.
PG1 (Pin 9, QFN Only): The PG1 pin is the open-drain
output of an internal window comparator. PG1 remains
low until the FB1 pin is within ±10% of its final regulation
voltage. PG1 output is valid when VIN1 or VIN2 are above
the minimum input voltage and EN is high.
IN2 (Pin 11/Pin 15), IN3/BD (Pin 5, MSOP), IN3 (Pin 6,
QFN): These pins are the inputs of the two LDOs. IN3/BD
also connects to the anode of the internal boost diode and
also supplies current to the LT3667’s internal regulator
when IN3/BD is above 3.2V.
PG2 (Pin 11, QFN Only): The PG2 pin is the open-drain
output of an internal window comparator. PG2 remains
low until the FB2 pin is within ±10% of its final regulation
voltage. PG2 output is valid when VIN1 or VIN2 are above
the minimum input voltage and EN is high.
EN2/ILIM2 (Pin 12/Pin 16), EN3/ILIM3 (Pin 13/Pin 17):
Precision current limit programming pins. They connect
to collectors of current mirror PNPs which are 1/799th
the size of the output power PNPs of the two LDOs. These
pins are also the inputs to the current limit amplifiers.
Current limit thresholds are set by connecting resistors
between the EN2/ILIM2 pin and GND and between the
EN3/ILIM3 pin and GND. Stability requirements demand
47nF capacitors in parallel to these resistors. For detailed
information on how to set the pin resistor values, see the
Operation section. If any of these pins is not used, tie it to
GND. To disable an LDO, pull its EN/ILIM pin above 1.2V.
PG3 (Pin 12, QFN Only): The PG3 pin is the open-drain
output of an internal window comparator. PG3 remains
low until the FB3 pin is within ±10% of its final regulation
voltage. PG3 output is valid when VIN1 or VIN2 are above
the minimum input voltage and EN is high.
PG (Pin 14/Pin 18): The PG pin is the open-drain output
of an internal window comparator. PG remains low until
the FB1, FB2, and FB3 pin are within ±10% of their final
regulation voltages. PG output is valid when VIN1 or VIN2
are above the minimum input voltage and EN is high.
For more information www.linear.com/LT3667
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11 Page | ||
| Páginas | Total 34 Páginas | |
| PDF Descargar | [ Datasheet LT3667.PDF ] | |
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