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부품번호 | AT86RF212 기능 |
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기능 | Low Power 700/800/900 MHz Transceiver | ||
제조업체 | ATMEL Corporation | ||
로고 | |||
전체 30 페이지수
Features
• Fully Integrated 700/800/900 MHz-Band Transceiver
- Chinese WPAN Band from 779 to 787 MHz
- European SRD Band from 863 to 870 MHz
- North American ISM Band from 902 to 928 MHz
• Direct Sequence Spread Spectrum with Different Modulation Schemes and
Data Rates
- BPSK with 20 and 40 kbit/s, compliant to IEEE 802.15.4-2003/2006
- O-QPSK with 100 and 250 kbit/s, compliant to IEEE 802.15.4-2006
- O-QPSK with 250 kbit/s, compliant to IEEE 802.15.4c-2009
- O-QPSK with 200, 400, 500, and 1000 kbit/s PSDU Data Rate
• Flexible Combination of Frequency Bands and Data Rates
• Industry Leading Link Budget
- Receiver Sensitivity up to -110 dBm
- Programmable TX Output Power up to +10 dBm
• Low Power Supply Voltage from 1.8 V to 3.6 V
- Internal Voltage Regulators and Battery Monitor
• Low Current Consumption
- SLEEP = 0.2 µA
- TRX_OFF = 0.4 mA
- RX_ON = 9.2 mA
- BUSY_TX = 17 mA at PTX = 5 dBm
• Digital Interface
- Registers, Frame Buffer, and AES Accessible through SPI
- Clock Output with Configurable Rate
• Radio Transceiver Features
- Adjustable Receiver Sensitivity
- Integrated TX/RX Switch, LNA, and PLL Loop Filter
- Fast Settling PLL Supporting Frequency Hopping
- Automatic VCO and Filter Calibration
- Integrated 16 MHz Crystal Oscillator
- 128 byte FIFO for Transmit/Receive
• IEEE 802.15.4-2006 Hardware Support
- FCS Computation and Check
- Clear Channel Assessment
- Received Signal Strength Indicator, Energy Detection, and Link Quality
Indication
• MAC Hardware Accelerator
- Automatic Acknowledgement and Retransmission
- CSMA-CA and Listen before Talk
- Automatic Frame Filtering
• AES 128 bit Hardware Accelerator (ECB and CBC modes)
• Extended Feature Set Hardware Support
- True Random Number Generation for Security Applications
- TX/RX Indication for External RF Front End Control
- Configurable SFD
• Optimized for Low BoM Cost and Ease of Production
- Low External Component Count: Antenna, Reference Crystal, and Bypass
Capacitors
- Excellent ESD Robustness
• Industrial Temperature Range from -40 °C to +85 °C
• 32-pin Low-profile Lead-free Plastic QFN Package, 5.0 x 5.0 x 0.9 mm3
• Compliant to IEEE 802.15.4-2003, IEEE 802.15.4-2006, IEEE 802.15.4c-2009,
ETSI EN 300 220-1, and FCC 47 CFR Section 15.247
Low Power
700/800/900 MHz
Transceiver for
IEEE 802.15.4-2006,
IEEE 802.15.4c-2009,
Zigbee,
6LoWPAN, and
ISM Applications
AT86RF212
8168C-MCU Wireless-02/10
2 Pin Configuration
2.1 Pin-out Diagram
Figure 2-1. AT86RF212 Pin-out Diagram
DIG3
DIG4
AVSS
RFP
RFN
AVSS
DVSS
/RST
32 31 30 29 28 27 26 25
1 exposed paddle 24
2 AVSS
23
3 22
4 AT86RF212 21
5 20
6 19
7 18
8 17
9 10 11 12 13 14 15 16
IRQ
/SEL
MOSI
DVSS
MISO
SCLK
DVSS
CLKM
2.2 Pin Description
Table 2-1. Pin Description
Pin Name
1 DIG3
2 DIG4
3 AVSS
4 RFP
5 RFN
6 AVSS
7 DVSS
8 /RST
9 DIG1
Note:
The exposed paddle is electrically connected to the die inside the package. It shall be
soldered to the board to ensure electrical and thermal contact and good mechanical
stability.
Type
Digital output
Digital output
Ground
RF I/O
RF I/O
Ground
Ground
Digital input
Digital output
Description
RX/TX Indication, see section 9.4;
if disabled, internally pulled to AVSS
RX/TX Indication (inverted DIG3), see section 9.4;
if disabled, internally pulled to AVSS
Ground for RF signals
Differential RF signal
Differential RF signal
Ground for RF signals
Digital ground
Chip reset; active low
General purpose signal, see section 9.3;
if disabled, internally pulled to DVSS
4 AT86RF212
8168C-MCU Wireless-02/10
4페이지 AT86RF212
2.2.1.3 Crystal Oscillator Pins
XTAL1, XTAL2
The pin XTAL1 is the input of the reference oscillator amplifier (XOSC), XTAL2 the
output. A detailed description of the crystal oscillator setup and the related
XTAL1/XTAL2 pin configuration can be found in section 7.7.
When using an external clock reference signal, XTAL1 shall be used as input pin. For
further details, refer to section 7.7.3.
2.2.1.4 Analog Pin Summary
Table 2-2. Analog Pin Behavior – DC Values
Pin Values and Conditions
Comments
RFP/RFN
VDC = 0.9 V (BUSY_TX)
VDC = 20 mV (receive states)
VDC = 0 mV (otherwise)
DC level at pins RFP/RFN for various transceiver states
AC-coupling is required if an antenna with a DC path to ground is used.
Serial capacitance and capacitance of each pin to ground must be
< 100 pF.
XTAL1/XTAL2 VDC = 0.9 V at both pins
CPAR = 3 pF
DC level at pins XTAL1/XTAL2 for various transceiver states
Parasitic capacitance (CPAR) of the pins must be considered as additional
load capacitance to the crystal.
DVDD
AVDD
VDC = 1.8 V (all states, except SLEEP)
VDC = 0 mV (otherwise)
VDC = 1.8 V (all states, except P_ON,
SLEEP, RESET, and TRX_OFF)
VDC = 0 mV (otherwise)
DC level at pin DVDD for various transceiver states
Supply pins (voltage regulator output) for the digital 1.8 V voltage domain.
The outputs shall be bypassed by 1 µF.
DC level at pin AVDD for various transceiver states
Supply pin (voltage regulator output) for the analog 1.8 V voltage domain.
The outputs shall be bypassed by 1 µF.
2.2.2 Digital Pins
The AT86RF212 provides a digital microcontroller interface. The interface comprises a
slave SPI (/SEL, SCLK, MOSI, and MISO) and additional control signals (CLKM, IRQ,
SLP_TR, /RST, and DIG2). The microcontroller interface is described in detail in section
4.
Additional digital output signals DIG1 … DIG4 are provided to control external blocks,
i.e. for Antenna Diversity RF switch control or as an RX/TX Indicator; see sections 9.3
and 9.4 respectively. After reset, these pins are connected to digital ground
(DIG1/DIG2) or analog ground (DIG3/DIG4).
2.2.2.1 Driver Strength Settings
The driver strength of all digital output pins (MISO, IRQ, DIG1, … , DIG4) and CLKM
pin can be configured using register 0x03 (TRX_CTRL_0); see Table 2-3.
Table 2-3. Digital Output Driver Configuration
Pin Default Driver Strength
Comment
MISO, IRQ, DIG1, … , DIG4
2 mA
Adjustable to 2 mA, 4 mA, 6 mA, and 8 mA
CLKM
4 mA
Adjustable to 2 mA, 4 mA, 6 mA, and 8 mA
The capacitive load should be as small as possible and not larger than 50 pF when
using the 2 mA minimum driver strength setting. Generally, the output driver strength
should be adjusted to the lowest possible value in order to keep the current
consumption and the emission of digital signal harmonics low.
8168C-MCU Wireless-02/10
7
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DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |