SN03ACP PDF 데이터시트 ( Data , Function )

부품번호 SN03ACP 기능
기능 High Power Factor Flyback PWM Controller
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SN03ACP 데이터시트, 핀배열, 회로
High Power Factor Flyback PWM Controller
SN03A is a high power factor flyback PWM
controller special for lighting applications.
SN03A features an internal start-up timer for
stand-alone applications, an analog multiplier with
for power factor correction (PFC), zero current
detector (ZCD) to ensure TM operation, a current
sensing comparator with built-in leading-edge
blanking, and a totem pole output ideally suited for
driving a power MOSFET.
SN03A offers great protection coverage including
system VCC under voltage lockout (UVLO),VCC
over voltage protection, Cycle-by-cycle current
limiting, and gate drive output clamping for
external power MOSFET protection.
Product Specification
Low Start-up Current and Operating Current
Cycle-by-Cycle Current Limiting
Internal Leading Edge Blanking
Analog multiplier for Power Factor Correction
Internal Startup Timer for Stand-alone
Trimmed 1.5% Internal Band gap Reference
Under Voltage Lockout with Hysteresis
VCC over voltage protection
Transition Mode (TM) Operation
Totem Pole Output with High State Clamping
Audio Noise Free
11V to 32V wide range of VCC voltage
Single Stage High PF Flyback AC/DC SMPS
LED Lighting Power
©On-Bright Electronics
Preliminary Datasheet

SN03ACP pdf, 반도체, 판매, 대치품
High Power Factor Flyback PWM Controller
©On-Bright Electronics
Preliminary Datasheet


SN03ACP 전자부품, 판매, 대치품
High Power Factor Flyback PWM Controller
SN03A is a high power factor flyback PWM
controller special for lighting application. The
transition mode control greatly reduces the switch
turn-on loss, improves the conversion efficiency
and provides very good power factor correction.
Startup Current and Start up Control
The typical startup current of SN03A is 5uA when
the VCC pin is lower than the UVLO threshold so
that VCC could be charged up and start up the
device. A high value, low wattage startup resistor
can therefore be used to minimize the power loss
during the normal operation.
PWM Modulator
SN03A employs peak current control in flyback
system with power factor correction. The PWM
stage compares the COMP signal (EA output)
with CS pin voltage to generate PWM duty cycle.
A new PWM cycle is always triggered by the Zero
Current Detection (ZCD) block, and exits
whenever the CS voltage exceeds COMP voltage.
Error Amplifier
The inverting input of the Error Amplifier (E/A) is
compared to an internal reference voltage (2.5V)
to determine COMP voltage. An external loop
compensation network is placed between COMP
and FB. COMP is subtracted by 2.5V and then is
internally connected to the multiplier input, as
shown in figure 1.
Analog Multiplier for Power Factor
The built-in analog multiplier output limits the
MOSFET peak current with respect to the AC half
wave rectified input voltage. Through controlling
the CS comparator threshold as the AC line
voltage traverses sinusoidally from zero to peak
line voltage, the load appears to be resistive to the
AC line and near to unity power factor can be
achieved. In SN03A, the two inputs for the
multiplier are designed to achieve good linearity
over a wide dynamic range to represent an AC
line free from distortion. Special efforts have been
made to assure universal line applications with
respect to a 90 to 264 VAC range. The multiplier
output is internally clamped to 1.0V, as shown in
Current Sensing Comparator and Leading
Edge Blanking
Cycle-by-Cycle current limiting is offered in
SN03A. The switch current is detected by a sense
resistor into the sense pin. An internal leading
edge blanking circuit chops off the sense voltage
spike at initial MOSFET on state due to Snubber
diode reverse recovery so that the external RC
filtering on sense input is no longer required. The
current limit comparator is disabled and thus
cannot turn off the external MOSFET during the
blanking period. PWM duty cycle is determined by
the current sense input voltage and COMP pin
Zero Current Detection
SN03A performs zero current detection (ZCD) by
monitoring the voltage activity on the auxiliary
windings through ZCD pin in series with an
external resistor. This voltage features a flyback
polarity. When the stored energy of the flyback
transformer is fully released to the output, the
voltage at ZCD pin decreases. When ZCD pin
voltage falls below 0.25V, an internal ZCD
comparator is triggered and a new PWM switching
cycle is initiated following the ZCD triggering. If no
zero current triggering signal is detected on ZCD
pin, the “Startup Timer” block in SN03A will
generate a restart signal in 55 usec (typ.) after the
last PWM signal. The maximum and minimum
voltage of ZCD pin is internally clamped to 5.8V
and 0V respectively.
Gate Drive Output
The output stage is designed to ensure zero
cross-conduction current. This minimizes heat
dissipation, increase efficiency, and enhance
reliability. The output driver is also slew rate
controlled to minimize EMI. The built-in 16V clamp
at the gate output protects the MOSFET gate from
high voltage stress.
Protection Controls
SN03A ensures good reliability design through its
good protection coverage. VCC under voltage
lockout (UVLO), VCC over voltage protection(auto
recovery), Cycle-by-cycle current limiting and
output gate clamp are standard features provided
by SN03A.
©On-Bright Electronics
Preliminary Datasheet


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전력 반도체 판매 ( IGBT, TR 모듈, SCR, 다이오드 모듈 )

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High Power Factor Flyback PWM Controller


High Power Factor Flyback PWM Controller

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