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HCPL-0700 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 HCPL-0700
기능 LOW INPUT CURRENT HIGH GAIN SPLIT DARLINGTON OPTOCOUPLERS
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HCPL-0700 데이터시트, 핀배열, 회로
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0700
HCPL-0701
DESCRIPTION
The HCPL-0700 and HCPL-0701 optocouplers consist of an AlGaAs LED optically coupled to a high gain split darlington
photodetector housed in a compact 8-pin small outline package.
The split darlington configuration separating the input photodiode and the first stage gain from the output transistor permits lower
output saturation voltage and higher speed operation than possible with conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high current transfer ratio of 2000% makes this family particularly
useful for input interface to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is ensured to CMOS as well as high
fan-out TTL requirements.
FEATURES
• Low current - 0.5 mA
• Superior CTR-2000%
• Superior CMR-10 kV/µs
• CTR guaranteed 0-70°C
• *BSI, CSA and UL approval
PACKAGE DIMENSIONS
0.164 (4.16)
0.144 (3.66)
APPLICATIONS
• Digital logic ground isolation
• Telephone ring detector
• EIA-RS-232C line receiver
• High common mode noise
line receiver
• µP bus isolation
• Current loop receiver
N/C 1
+2
V
F
_3
N/C 4
8
V
CC
7
V
B
6V
O
5 GND
HCPL-0700 / HCPL-0701
Pin 1
0.202 (5.13)
0.182 (4.63)
0.143 (3.63)
0.123 (3.13)
0.019 (0.48)
0.010 (0.25)
0.006 (0.16)
0.021 (0.53)
0.011 (0.28)
0.008 (0.20)
0.003 (0.08)
0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
Lead Coplanarity : 0.004 (0.10) MAX
NOTE
All dimensions are in inches (millimeters)
© 2003 Fairchild Semiconductor Corporation
Page 1 of 11
8/18/03




HCPL-0700 pdf, 반도체, 판매, 대치품
HCPL-0700
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0701
SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified., VCC = 5 V)
Parameter
Test Conditions Symbol Device Min Typ** Max Unit
Propagation delay
time to logic low
(Note 2) (Fig. 13)
Propagation delay
time to logic high
(Note 2) (Fig. 13)
Common mode
transient
immunity at
logic high
Common mode
transient
immunity at
logic low
(RL = 4.7 k, IF = 0.5 mA)
TA = 25°C
HCPL-0701
30
4
25
(RL = 270 , IF = 12 mA)
TA = 25°C
TPHL
HCPL-0701
2
0.2 µs
1
(RL = 2.2 k, IF = 1.6 mA)
TA = 25°C
HCPL-0700
15
1.5
10
(RL = 4.7 k, IF = 0.5 mA)
(RL = 4.7 k, IF = 0.5 mA) TA = 25°C
(RL = 270 , IF = 12 mA)
TA = 25°C
TPLH
HCPL-0701
HCPL-0701
90
12
60
10
1.3 µs
7
(RL = 2.2 k, IF = 1.6 mA)
TA = 25°C
HCPL-0700
50
7
35
HCPL-0700
(IF = 0 mA, |VCM| = 10 VP-P)
TA = 25°C (RL = 2.2 k) (Note 3) (Fig. 14)
|CMH|
1,000 10,000
HCPL-0701
V/µs
(IF = 1.6 mA, |VCM| = 10 VP-P, RL = 2.2
k)
TA = 25°C (Note 3) (Fig. 14)
|CML|
HCPL-0700
1,000 10,000
HCPL-0701
V/µs
NOTES
1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVCM/dt on the leading edge of the
common mode pulse signal, VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode
pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.
** All typicals at TA = 25°C
© 2003 Fairchild Semiconductor Corporation
Page 4 of 11
8/18/03

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HCPL-0700 전자부품, 판매, 대치품
HCPL-0700
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
HCPL-0701
TYPICAL PERFORMANCE CURVES
Fig. 8 Output Current vs. Input Forward Current
100
10
TA = 85˚C
1
0.1
0.01
0.01
TA = 70˚C
TA = 25˚C
TA = 0˚C
TA = -40˚C
0.1 1
IF - INPUT FORWARD CURRENT (mA)
VCC = 5V
VO = 0.4V
10
Fig. 9 Input Forward Current vs. Forward Voltage
100
TA = 85˚C
10
TA = 70˚C
1
0.1
0.01
0.001
1.1
TA = 25˚C
TA = 0˚C
TA = -40˚C
1.2 1.3 1.4 1.5
VF - FORWARD VOLTAGE (V)
1.6
Fig. 10 Logic Low Supply Current
vs. Input Forward Current
0.5
Logic Low Supply Current vs.
Input Forward Current
0.4
VCC = 18V
0.3
VCC = 5V
0.2
0.1
Fig. 11 DC Transfer Characteristics
80
IF = 5.0mA
IF = 4.5mA
IF = 4.0mA
60
IF = 3.5mA
IF = 3.0mA
IF = 2.5mA
VCC= 5V
TA = 25˚C
40
20
IF = 2.0mA
IF = 1.5mA
IF = 1.0mA
IF = 0.5mA
0.0
0.0
0.2 0.4 0.6 0.8 1.0 1.2 1.4
IF - INPUT FORWARD CURRENT (mA)
1.6
0
0
1
VO - OUTPUT VOLTAGE (V)
2
Fig. 12 Current Transfer Ratio
vs. Input Forward Current
3500
3000
TA = 85˚C
VCC = 5V
VO = 0.4V
2500
2000
TA = 70˚C
TA = 25˚C
1500
1000
500
TA = 0˚C
TA = -40˚C
0
0.1 1 10
IF - INPUT FORWARD CURRENT (mA)
© 2003 Fairchild Semiconductor Corporation
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