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HCPL4100 데이터시트 PDF




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부품번호 HCPL4100 기능
기능 Optically Coupled 20 mA Current Loop Transmitter
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HCPL4100 데이터시트, 핀배열, 회로
Optically Coupled 20 mA
Current Loop Transmitter
Technical Data
HCPL-4100
Features
• Guaranteed 20 mA Loop
Parameters
• Data Input Compatible with
LSTTL, TTL and CMOS
Logic
• Guaranteed Performance
over Temperature (0°C to
70°C)
• Internal Shield for High
Common Mode Rejection
• 20 kBaud Data Rate at 400
Metres Line Length
• Guaranteed On and Off
Output Current Levels
• Safety Approval
UL Recognized -2500 V rms for
1 minute
CSA Approved
• Optically Coupled 20 mA
Current Loop Receiver,
HCPL-4200, Also Available
Description
The HCPL-4100 optocoupler is
designed to operate as a transmit-
ter in equipment using the 20 mA
current loop. 20 mA current loop
systems conventionally signal a
logic high state by transmitting
20 mA of loop current (MARK),
and signal a logic low state by
allowing no more than a few
milliamperes of loop current
(SPACE). Optical coupling of the
signal from the logic input to the
20 mA current loop breaks
ground loops and provides very
high immunity to common mode
interference.
Functional Diagram
The HCPL-4100 data input is
compatible with LSTTL, TTL, or
CMOS logic gates. The input
integrated circuit drives a GaAsP
LED. The light emitted by the
LED is sensed by a second inte-
grated circuit that allows 20 mA
to pass with a voltage drop of less
than 2.7 volts when no light is
emitted and allows less than 2 mA
to pass when light is emitted. The
transmitter output is capable of
withstanding 27 volts. The input
integrated circuit provides a
controlled amount of LED drive
current and takes into account
any LED light output degrada-
tion. The internal shield allows a
guaranteed 1000 V/µs common
mode transient immunity.
Applications
• Isolated 20 mA Current
Loop Transmitter in:
Computer Peripherals
Industrial Control Equipment
Data Communications
Equipment
A 0.1 µF bypass capacitor connected between pins 8 and 5 is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.




HCPL4100 pdf, 반도체, 판매, 대치품
4
Regulatory Information
The HCPL-4100 has been
approved by the following
organizations:
UL
Recognized under UL 1577,
Component Recognition
Program, File E55361.
CSA
Approved under CSA Component
Acceptance Notice #5, File CA
88324.
Insulation and Safety Related Specifications
Parameter
Symbol Value Units
Conditions
Min. External Air Gap
(External Clearance)
L(IO1) 7.1 mm Measured from input terminals to output
terminals, shortest distance through air
Min. External Tracking Path
(External Creepage)
L(IO2) 7.4 mm Measured from input terminals to output
terminals, shortest distance path along body
Min. Internal Plastic Gap
(Internal Clearance)
0.08 mm Through insulation distance, conductor to
conductor, usually the direct distance
between the photoemitter and photodetector
inside the optocoupler cavity
Tracking Resistance
(Comparative Tracking Index)
CTI
200 Volts DIN IEC 112/VDE 0303 PART 1
Isolation Group
IIIa Material Group (DIN VDE 0110, 1/89, Table 1)
Option 300 – surface mount classification is Class A in accordance with CECC 00802.
Absolute Maximum Ratings
(No Derating Required up to 55°C)
Storage Temperature .................................................. -55°C to +125°C
Operating Temperature ................................................. -40°C to +85°C
Lead Solder Temperature .... 260°C for 10 s (1.6 mm below seating plane)
Supply Voltage – VCC .............................................................. 0 V to 20 V
Average Output Current - IO ........................................ -30 mA to 30 mA
Peak Output Current - IO ........................................... Internally Limited
Output Voltage – VO ........................................................ -0.4 V to 27 V
Input Voltage – VI ............................................................ -0.5 V to 20 V
Input Power Dissipation – PI ................................................. 265 mW[1]
Output Power Dissipation – PO ............................................. 125 mW[2]
Total Power Dissipation – P .................................................. 360 mW[3]
Infrared and Vapor Phase Reflow Temperature
(Option #300) .......................................... see Fig. 1, Thermal Profile

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HCPL4100 전자부품, 판매, 대치품
7
Notes:
1. Derate linearly above 55 °C free air
temperature at a rate of 3.8 mW/ °C.
Proper application of the derating
factors will prevent IC junction
temperatures from exceeding 125 °C
for ambient temperatures up to 85 °C.
2. Derate linearly above a free-air
temperature of 70 °C at a rate of 2.3
mW/ °C. A significant amount of
power may be dissipated in the
HCPL-4100 output circuit during the
transition from the SPACE state to
the MARK state when driving a data
line or capacitive load (C OUT). The
average power dissipation during the
transition can be estimated from the
following equation which assumes a
linear discharge of a capacitive load:
P = ISC (VSO + VMO)/2, where VSO is
the output voltage in the SPACE
state. The duration of this transition
can be estimated as t = C OUT (VSO -
VMO)/ISC. For typical applications
driving twisted pair data lines with
NRZ data as shown in Figure 11, the
transition time will be less than 10%
of one bit time.
3. Derate linearly above 55 °C free-air
temperature at a rate of 5.1 mW/ °C.
4. The maximum current that will flow
into the output in the mark state (I SC)
is internally limited to protect the
device. The duration of the output
short circuit shall not exceed 10 ms.
5. The device is considered a two
terminal device, pins 1, 2, 3, and 4
are connected together, and pins 5,
6, 7, and 8 are connected together.
6. The t PLH propagation delay is
measured from the 1.3 volt level on
the leading edge of the input pulse to
the 10 mA level on the leading edge
of the output pulse.
7. The t PHL propagation delay is
measured from the 1.3 volt level on
the trailing edge of the input pulse to
the 10 mA level on the trailing edge
of the output pulse.
8. The rise time, t r, is measured from the
10% to the 90% level on the rising
edge of the output current pulse.
9. The fall time, t f, is measured from the
90% to the 10% level on the falling
edge of the output current pulse.
10. Common mode transient immunity in
the logic high level is the maximum
(positive) dVCM/dt on the leading
edge of the common mode pulse,
VCM, that can be sustained with the
output in a Mark ("H") state (i.e.,
IO > 12 mA).
11. Common mode transient immunity in
the logic low level is the maximum
(positive) dVCM/dt on the leading
edge of the common mode pulse,
VCM, that can be sustained with the
output in a Space ("L") state (i.e., IO
< 3 mA).
12. Use of a 0.1 µF bypass capacitor
connected between pins 5 and 8 is
recommended.
13. In accordance with UL 1577, each
optocoupler is momentary withstand
proof tested by applying an insulation
test voltage 3000 V rms for 1
second (leakage detection current
limit, Ii-o 5 µA).
3.0
2.8 IO
2.6 20 mA
VCC = 5 V
VI = 2 V
2.4
12 mA
2.2
2.0 2 mA
1.8
1.6
1.4
1.2
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE – °C
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0
VCC = 5 V
VI = 2 V
TA = 25 °C
5 10 15 20 25
IO – OUTPUT CURRENT – mA
30
1.3 VCC = 5 V
1.2 VI = 0.8 V
1.1
1.0
VO
27 V
0.9
20 V
0.8
0.7
0.6
-40 -20 0 20 40 60 80 100
TA – TEMPERATURE – °C
Figure 2. Typical Mark State Output
Voltage vs. Temperature.
Figure 3. Typical Output Voltage vs.
Loop Current.
Figure 4. Typical Space State Output
Current vs. Temperature.

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부품번호상세설명 및 기능제조사
HCPL4100

Optically Coupled 20 mA Current Loop Transmitter

Agilent(Hewlett-Packard)
Agilent(Hewlett-Packard)

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