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PDF BUK6507-55C Data sheet ( Hoja de datos )

Número de pieza BUK6507-55C
Descripción N-channel TrenchMOS logic and standard level FET
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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BUK6507-55C
N-channel TrenchMOS logic and standard level FET
Rev. 01 — 12 October 2010
Product data sheet
1. Product profile
1.1 General description
Intermediate level gate drive N-channel enhancement mode Field-Effect Transistor (FET)
in a plastic package using advanced TrenchMOS technology. This product has been
designed and qualified to the appropriate AEC Q101 standard for use in high performance
automotive applications.
1.2 Features and benefits
„ AEC Q101 compliant
„ Suitable for standard and logic level
gate drives
„ Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
„ 12 V and 24 V automotive systems
„ Electric and electro-hydraulic power
steering
„ Motors, lamps and solenoid control
„ Start-Stop micro-hybrid applications
„ Transmission control
„ Ultra high performance power
switching
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter
Conditions
VDS drain-source voltage Tj 25 °C; Tj 175 °C
ID drain current VGS = 10 V; Tmb = 25 °C;
see Figure 1
Ptot total power
dissipation
Tmb = 25 °C; see Figure 2
Static characteristics
RDSon
drain-source on-state VGS = 10 V; ID = 25 A;
resistance
Tj = 25 °C; see Figure 11
Min Typ Max Unit
- - 55 V
- - 100 A
- - 158 W
- 5.8 7 m

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BUK6507-55C pdf
NXP Semiconductors
BUK6507-55C
N-channel TrenchMOS logic and standard level FET
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
thermal resistance from junction to
mounting base
Conditions
see Figure 4
Min Typ Max Unit
- - 0.95 K/W
1
Zth(j-mb)
(K/W) δ = 0.5
0.2
10-1
0.1
0.05
0.02
10-2
single shot
003aae317
P δ = tp
T
10-3
10-6
10-5
10-4
10-3
10-2
tp
T
t
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration
BUK6507-55C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 October 2010
© NXP B.V. 2010. All rights reserved.
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BUK6507-55C arduino
NXP Semiconductors
8. Revision history
Table 7. Revision history
Document ID
Release date
BUK6507-55C v.1
20101012
BUK6507-55C
N-channel TrenchMOS logic and standard level FET
Data sheet status
Product data sheet
Change notice
-
Supersedes
-
BUK6507-55C
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 12 October 2010
© NXP B.V. 2010. All rights reserved.
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