Datasheet.kr   

HCS125KMSR 데이터시트 PDF




Intersil Corporation에서 제조한 전자 부품 HCS125KMSR은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 HCS125KMSR 자료 제공

부품번호 HCS125KMSR 기능
기능 Radiation Hardened Quad Buffer/ Three-State
제조업체 Intersil Corporation
로고 Intersil Corporation 로고


HCS125KMSR 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.



전체 9 페이지수

미리보기를 사용할 수 없습니다

HCS125KMSR 데이터시트, 핀배열, 회로
HCS125MS
September 1995
Radiation Hardened
Quad Buffer, Three-State
Features
• 3 Micron Radiation Hardened SOS CMOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-Day
(Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s, 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• Input Logic Levels
- VIL = 30% of VCC Max
- VIH = 70% of VCC Min
• Input Current Levels Ii 5µA at VOL, VOH
Description
The Intersil HCS125MS is a Radiation Hardened quad three-state
buffer, each having its own output enable input. A high level on the
enable input puts the output in a high impedance state.
The HCS125MS utilizes advanced CMOS/SOS technology to
achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family.
The HCS125MS is supplied in a 14 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T14, LEAD FINISH C
TOP VIEW
OE1 1
A1 2
Y1 3
OE2 4
A2 5
Y2 6
GND 7
14 VCC
13 OE4
12 A4
11 Y4
10 OE3
9 A3
8 Y3
14 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP3-F14, LEAD FINISH C
TOP VIEW
OE1
A1
Y1
OE2
A2
Y2
GND
1 14
2 13
3 12
4 11
5 10
69
78
VCC
OE4
A4
Y4
OE3
A3
Y3
Ordering Information
Functional Diagram
PART
NUMBER
TEMPERATURE SCREENING
RANGE
LEVEL
PACKAGE
HCS125DMSR -55oC to +125oC Intersil Class 14 Lead SBDIP
S Equivalent
HCS125KMSR -55oC to +125oC Intersil Class 14 Lead Ceramic
S Equivalent Flatpack
HCS125D/
Sample
+25oC
Sample
14 Lead SBDIP
HCS125K/
Sample
+25oC
Sample
14 Lead Ceramic
Flatpack
HCS125HMSR
+25oC
Die
Die
An
OEn
P Yn
n
TRUTH TABLE
INPUTS
OUTPUT
An OEn Yn
HLH
LLL
XHZ
L = Low, H = High, X = Don’t Care, Z = High Impedance
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
123
Spec Number 518831
File Number 3559.1




HCS125KMSR pdf, 반도체, 판매, 대치품
Specifications HCS125MS
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER
Output Voltage High
Output Voltage Low
Input Leakage Current
Three-State Output
Leakage Current
Noise Immunity
Functional Test
Propagation Delay
Input to Y
Enable Delay
OE to Y
Disable Delay
OE to Y
SYMBOL
(NOTE 1)
CONDITIONS
VOH
VCC = 5.5V, VIH = 3.85V,
VIL = 1.65V, IOH = -50µA
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, IOH = -50µA
VOL
VCC = 5.5V, VIH = 3.85V,
VIL = 1.65V, IOL = 50µA
VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, IOL = 50µA
IIN VCC = 5.5V, VIN = VCC or GND
IOZ VCC = 5.5V, Force Voltage
= 0V or VCC
FN VCC = 4.5V, VIH = 3.15V,
VIL = 1.35V, (Note 2)
TPHL
TPLH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
TPZL
TPZH
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
TPLZ
TPHZ
VCC = 4.5V, VIH = 4.5V,
VIL = 0V
TEMPERATURE
+25oC
+25oC
+25oC
200K RAD
LIMITS
MIN MAX UNITS
VCC
-0.1
-
V
VCC
-0.1
-
V
- 0.1 V
+25oC
- 0.1 V
+25oC
+25oC
- ±5 µA
- ±50 µA
+25oC
- -V
+25oC
2 25 ns
+25oC
2 30 ns
+25oC
2 30 ns
NOTES:
1. All voltages referenced to device GND.
2. For functional tests, VO 4.0V is recognized as a logic “1”, and VO 0.5V is recognized as a logic “0”.
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC)
PARAMETER
GROUP B
SUBGROUP
DELTA LIMIT
ICC 5 +12µA
IOL/IOH
5 15% of 0 Hour
IOZ 5 ±200nA
Spec Number 518831
126

4페이지










HCS125KMSR 전자부품, 판매, 대치품
HCS125MS
Propagation Delay Timing Diagram
Propagation Delay Load Circuit
VIH
VSS
VOH
VOL
VS INPUT
TPLH
VS
TPHL
OUTPUT
DUT
CL
TEST
POINT
RL CL = 50pF
RL = 500
Transition Timing Diagram
VOH
VOL
TTLH
20%
80% 80%
OUTPUT
TTHL
20%
PARAMETER
VCC
VIH
VS
VIL
GND
VOLTAGE LEVELS
HCS
4.50
4.50
2.25
0
0
UNITS
V
V
V
V
V
Three-State High Timing Diagrams
VIH
VSS
VOH
VOZ
VS INPUT
TPZH
VT
TPHZ
OUTPUT
VW
THREE-STATE HIGH VOLTAGE LEVELS
PARAMETER
HCS
UNITS
VCC
4.50 V
VIH 4.50 V
VS 2.25 V
VT 2.25 V
VW 3.60 V
GND
0V
Three-State High Load Circuit
DUT
TEST
POINT
CL RL CL = 50pF
RL = 500
Spec Number 518831
129

7페이지


구       성 총 9 페이지수
다운로드[ HCS125KMSR.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
HCS125KMSR

Radiation Hardened Quad Buffer/ Three-State

Intersil Corporation
Intersil Corporation

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵