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PDF BUK9Y104-100B Data sheet ( Hoja de datos )
| Número de pieza | BUK9Y104-100B | |
| Descripción | N-channel TrenchMOS logic level FET | |
| Fabricantes | NXP Semiconductors | |
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BUK9Y104-100B
N-channel TrenchMOS logic level FET
Rev. 04 — 7 April 2010
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product has been designed and qualified to
the appropriate AEC standard for use in automotive critical applications.
1.2 Features and benefits
Low conduction losses due to low
on-state resistance
Q101 compliant
Suitable for logic level gate drive
sources
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V, 24 V and 42 V loads
Automotive systems
DC-to-DC converters
General purpose power switching
Solenoid drivers
1.4 Quick reference data
Table 1. Quick reference data
Symbol Parameter
Conditions
VDS
drain-source
Tj ≥ 25 °C; Tj ≤ 175 °C
voltage
ID
drain current
VGS = 5 V; Tmb = 25 °C;
see Figure 1; see Figure 3
Ptot
total power
Tmb = 25 °C
dissipation
Static characteristics
RDSon
drain-source
on-state
resistance
VGS = 10 V; ID = 5 A; Tj = 25 °C
VGS = 5 V; ID = 5 A; Tj = 25 °C;
see Figure 11; see Figure 12
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source
avalanche energy
Dynamic characteristics
ID = 14.8 A; Vsup ≤ 100 V;
RGS = 50 Ω; VGS = 5 V;
Tj(init) = 25 °C; unclamped
QGD
gate-drain charge VGS = 5 V; ID = 5 A;
VDS = 80 V; see Figure 13
Min Typ Max Unit
- - 100 V
- - 14.8 A
- - 59 W
- 86 99 mΩ
- 91 104 mΩ
- - 35 mJ
- 4.7 - nC
1 page  
NXP Semiconductors
BUK9Y104-100B
N-channel TrenchMOS logic level FET
5. Thermal characteristics
Table 5.
Symbol
Rth(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
Conditions
see Figure 4
Min Typ Max Unit
- - 2.53 K/W
10
Zth (j-mb)
(K/W)
1
δ = 0.5
0.2
0.1
003aac483
10-1 0.05
0.02
P δ = tp
T
single shot
tp t
10-2
10-6
10-5
10-4
10-3
10-2
T
10-1
tp (s)
1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
BUK9Y104-100B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 7 April 2010
© NXP B.V. 2010. All rights reserved.
5 of 14
5 Page 
NXP Semiconductors
BUK9Y104-100B
N-channel TrenchMOS logic level FET
8. Revision history
Table 7. Revision history
Document ID
Release date Data sheet status
Change notice
BUK9Y104-100B_4
Modifications:
20100407
Product data sheet
-
• Status changed from objective to product.
BUK9Y104-100B_3
20100211
Objective data sheet
-
Supersedes
BUK9Y104-100B_3
BUK9Y104-100B_2
BUK9Y104-100B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 7 April 2010
© NXP B.V. 2010. All rights reserved.
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