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PDF TSA5059 Data sheet ( Hoja de datos )
| Número de pieza | TSA5059 | |
| Descripción | 2.7GHz I2C-bus controlled low phase noise frequency synthesizer | |
| Fabricantes | Philips | |
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INTEGRATED CIRCUITS
DATA SHEET
TSA5059
2.7 GHz I2C-bus controlled
low phase noise frequency
synthesizer
Preliminary specification
File under Integrated Circuits, IC02
1999 Oct 05
1 page  
Philips Semiconductors
2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer
Preliminary specification
TSA5059
PINNING
SYMBOL
CP
XTAL
XT/COMP
AS
SDA
SCL
P3
P2
P1
P0
ADC
VCC
RFA
RFB
GND
VT
PIN DESCRIPTION
1 charge pump output
2 crystal oscillator input
3 fxtal or fcomp signal output
4 I2C-bus address selection input
5 I2C-bus serial data input/output
6 I2C-bus serial clock input
7 general purpose output Port 3
8 general purpose input/output Port 2
9 general purpose input/output Port 1
10 general purpose input/output Port 0
11 analog-to-digital converter input
12 supply voltage
13 RF signal input A
14 RF signal input B
15 ground supply
16 tuning voltage output
handbook, halfpage
CP 1
16 VT
XTAL 2
15 GND
XT/COMP 3
14 RFB
AS 4
SDA 5
13 RFA
TSA5059
12 VCC
SCL 6
11 ADC
P3 7
10 P0
P2 8
9 P1
FCE121
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
The TSA5059 contains all the necessary elements but a
reference source and a loop filter to control a varicap tuned
local oscillator forming a phase locked loop frequency
synthesized source. The IC is designed in a high speed
process with a fast phase detector to allow a high
comparison frequency to reach a low phase noise level on
the oscillator.
The block diagram is shown in Fig.1. The RF signal is
applied at pins RFA and RFB. Thanks to the input
preamplifier a good sensitivity is provided. The output of
the preamplifier is fed to the 17-bit programmable divider
either through a divide-by-two prescaler or directly.
Because of the internal high speed process, the RF divider
is working for a frequency up to 2.7 GHz, without the need
for the divide-by-two prescaler to be used. This prescaler
is present on chip for compatibility reasons with existing
circuits.
The output of the 17-bit programmable divider fDIV is fed
into the phase comparator, where it is compared in both
phase and frequency with the comparison frequency fcomp.
This frequency is derived from the signal present at
pin XTAL, fxtal, divided down in the reference divider. It is
possible either to connect a quartz crystal to pin XTAL and
then using the on-chip crystal oscillator, or to feed this pin
with a reference signal from an external source.
The reference divider can have a dividing ratio selected
from 16 different values between 2 and 320, including the
ratio 24 to cope with the offset requirement of the UK-DTT
system, see Table 8.
The output of the phase comparator drives the
charge pump and the loop amplifier section. This amplifier
has an on-chip high voltage drive transistor which avoids
the use of an additional external component. Pin CP is the
output of the charge pump, and pin VT is the pin to drive
the tuning voltage to the varicap diode of the Voltage
Controlled Oscillator (VCO). The loop filter has to be
connected between pins CP and VT.
In addition, it is possible to drive another PLL synthesizer,
or the clock input of a digital demodulation IC, from the
pin XT/COMP. It is possible to select by software either
fxtal, the crystal oscillator frequency or fcomp, the frequency
present after the reference divider at this pin. It is also
possible to switch off this output, in case it is not used.
For test and alignment purposes, it is possible to release
the tuning voltage output to be able to apply an external
voltage on it, to select one of the three charge pump test
modes, and to monitor half the fDIV at Port P0. See
Table 10 for all possible modes.
1999 Oct 05
5
5 Page 
Philips Semiconductors
2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer
Preliminary specification
TSA5059
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); note 1.
SYMBOL
VCC
V(n)
IO(SDA)
IO(Px)
IO(ΣPx)
Tamb
Tstg
Tj(max)
tsc
PARAMETER
supply voltage
voltage on pins
CP, XTAL, XT/COMP, AS, P0, P1,
P2, P3, ADC, RFA and RFB
SCL and SDA
VT
serial data output current
P0, P1, P2 and P3 output current
sum of currents in P0, P1, P2 and P3
ambient temperature
storage temperature
maximum junction temperature
short-circuit time
CONDITIONS
port switched on
each pin to VCC or GND
MIN.
−0.3
−0.3
−0.3
−0.3
−1.0
−1.0
−
−20
−40
−
−
MAX.
+6.0
UNIT
V
VCC + 0.3 V
+6.0
+35
+10.0
+20.0
50.0
+85
+150
150
10
V
V
mA
mA
mA
°C
°C
°C
s
Note
1. Maximum ratings cannot be exceeded, not even momentarily without causing irreversible IC damage. Maximum
ratings cannot be accumulated.
HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be completely safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
THERMAL CHARACTERISTICS
SYMBOL
Rth(j-a)
PARAMETER
thermal resistance from junction to ambient
TSA5059T (SOT109-1; SO16)
TSA5059TS (SOT369-1; SSOP16)
CONDITIONS
in free air
VALUE UNIT
115 K/W
144 K/W
1999 Oct 05
11
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet TSA5059.PDF ] | |
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