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HCTS393K 데이터시트 PDF




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부품번호 HCTS393K 기능
기능 Radiation Hardened Dual 4-Stage Binary Counter
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HCTS393K 데이터시트, 핀배열, 회로
HCTS390MS
September 1995
Radiation Hardened
Dual Decade Ripple Counter
Features
Pinouts
• 3 Micron Radiation Hardened CMOS SOS
• Total Dose 200K RAD (Si)
• SEP Effective LET No Upsets: >100 MEV-cm2/mg
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/
Bit-Day (Typ)
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse
• Latch-Up Free Under Any Conditions
• Military Temperature Range: -55oC to +125oC
• Significant Power Reduction Compared to LSTTL ICs
• DC Operating Voltage Range: 4.5V to 5.5V
• LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = 2.0V Min
• Input Current Levels Ii 5µA at VOL, VOH
16 LEAD CERAMIC DUAL-IN-LINE
METAL SEAL PACKAGE (SBDIP)
MIL-STD-1835 CDIP2-T16
TOP VIEW
CP0N 1 1
MR 1 2
Q0 1 3
CP1N 1 4
Q1 1 5
Q2 1 6
Q3 1 7
GND 8
16 VCC
15 CP0N 2
14 MR 2
13 Q0 2
12 CP1N 2
11 Q1 2
10 Q2 2
9 Q3 2
16 LEAD CERAMIC METAL SEAL
FLATPACK PACKAGE (FLATPACK)
MIL-STD-1835 CDFP4-F16
TOP VIEW
Description
The Intersil HCTS390MS is a Radiation Hardened dual
decade ripple counter.
The HCTS390MS utilizes advanced CMOS/SOS technology
to achieve high-speed operation. This device is a member of
radiation hardened, high-speed, CMOS/SOS Logic Family .
The HCTS390MS is supplied in a 16 lead Ceramic flatpack
(K suffix) or a SBDIP Package (D suffix).
CP0N 1
MR 1
Q0 1
CP1N 1
Q1 1
Q2 1
Q3 1
GND
1 16
2 15
3 14
4 13
5 12
6 11
7 10
89
VCC
CP0N 2
MR 2
Q0 2
CP1N 2
Q1 2
Q2 2
Q3 2
Ordering Information
PART NUMBER
HCTS390DMSR
HCTS390KMSR
HCTS390D/Sample
HCTS390K/Sample
HCTS390HMSR
TEMPERATURE RANGE
-55oC to +125oC
-55oC to +125oC
+25oC
+25oC
+25oC
SCREENING LEVEL
Intersil Class S Equivalent
Intersil Class S Equivalent
Sample
Sample
Die
PACKAGE
16 Lead SBDIP
16 Lead Ceramic Flatpack
16 Lead SBDIP
16 Lead Ceramic Flatpack
Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
662
Spec Number 518634
File Number 2476.2




HCTS393K pdf, 반도체, 판매, 대치품
Specifications HCTS390MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER
CP0N to Q0n
CP1Nn to Q1n
CP1Nn to Q2n
CP1Nn to Q3n
MR to QNn
SYMBOL
(NOTES 1, 2)
CONDITIONS
TPHL
TPLH
VCC = 4.5V
TPHL
TPLH
VCC = 4.5V
TPHL
TPLH
VCC = 4.5V
TPHL
TPLH
VCC = 4.5V
TPHL VCC = 4.5V
GROUP
A SUB-
GROUPS
9
10, 11
9
10, 11
9
10, 11
9
10, 11
9
10, 11
TEMPERATURE
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
NOTES:
1. All voltages referenced to device GND.
2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = 3V.
LIMITS
MIN MAX UNITS
2 22 ns
2 27 ns
2 29 ns
2 35 ns
2 34 ns
2 41 ns
2 29 ns
2 35 ns
2 23 ns
2 29 ns
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Capacitance Power
Dissipation
SYMBOL
CONDITIONS
CPD
VCC = 5.0V, f = 1MHz
Input Capacitance
CIN VCC = 5.0V, f = 1MHz
Output Transition
Time
TTHL
TTLH
VCC = 4.5V
Max Operating
Frequency
FMAX VCC = 4.5V
Pulse Width CP0Nn, TW VCC = 4.5V
CP1Nn
Pulse Width Reset
TW VCC = 4.5V
Removal Time
Reset
TREM VCC = 4.5V
NOTES
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
TEMPERATURE
+25oC
+125oC, -55oC
+25oC
+125oC
+25oC
+125oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
+25oC
+125oC, -55oC
MIN MAX UNITS
- 50 pF
- 56 pF
- 10 pF
- 10 pF
- 15 ns
- 22 ns
- 27 MHz
- 18 MHz
15 - ns
22 - ns
13 - ns
20 - ns
15 - ns
22 - ns
NOTES:
1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly
tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics.
2. Applies to DIC packaged devices.
3. Applies to Flatpack packaged devices.
Spec Number 518634
665

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HCTS393K 전자부품, 판매, 대치품
HCTS390MS
Intersil Space Level Product Flow - ‘MS’
Wafer Lot Acceptance (All Lots) Method 5007
(Includes SEM)
GAMMA Radiation Verification (Each Wafer) Method 1019,
4 Samples/Wafer, 0 Rejects
100% Nondestructive Bond Pull, Method 2023
Sample - Wire Bond Pull Monitor, Method 2011
Sample - Die Shear Monitor, Method 2019 or 2027
100% Internal Visual Inspection, Method 2010, Condition A
100% Temperature Cycle, Method 1010, Condition C,
10 Cycles
100% Constant Acceleration, Method 2001, Condition per
Method 5004
100% PIND, Method 2020, Condition A
100% External Visual
100% Serialization
100% Initial Electrical Test (T0)
100% Static Burn-In 1, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Interim Electrical Test 1 (T1)
100% Delta Calculation (T0-T1)
100% Static Burn-In 2, Condition A or B, 24 hrs. min.,
+125oC min., Method 1015
100% Interim Electrical Test 2 (T2)
100% Delta Calculation (T0-T2)
100% PDA 1, Method 5004 (Notes 1and 2)
100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or
Equivalent, Method 1015
100% Interim Electrical Test 3 (T3)
100% Delta Calculation (T0-T3)
100% PDA 2, Method 5004 (Note 2)
100% Final Electrical Test
100% Fine/Gross Leak, Method 1014
100% Radiographic, Method 2012 (Note 3)
100% External Visual, Method 2009
Sample - Group A, Method 5005 (Note 4)
100% Data Package Generation (Note 5)
NOTES:
1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1.
2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the
failures from subgroup 7.
3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004.
4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005.
5. Data Package Contents:
• Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number,
Quantity).
• Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage.
• GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test
equipment, etc. Radiation Read and Record data on file at Intersil.
• X-Ray report and film. Includes penetrometer measurements.
• Screening, Electrical, and Group A attributes (Screening attributes begin after package seal).
• Lot Serial Number Sheet (Good units serial number and lot number).
• Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test.
• The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed
by an authorized Quality Representative.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Spec Number 518634
668

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