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SSM3J36MFV 데이터시트 PDF




Toshiba Semiconductor에서 제조한 전자 부품 SSM3J36MFV은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 SSM3J36MFV 기능
기능 Field Effect Transistor
제조업체 Toshiba Semiconductor
로고 Toshiba Semiconductor 로고


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SSM3J36MFV 데이터시트, 핀배열, 회로
SSM3J36MFV
TOSHIBA Field Effect Transistor Silicon P Channel MOS Type
SSM3J36MFV
Power Management Switches
1.5-V drive
Low ON-resistance: Ron = 3.60 Ω (max) (@VGS = -1.5 V)
: Ron = 2.70 Ω (max) (@VGS = -1.8 V)
: Ron = 1.60 Ω (max) (@VGS = -2.8 V)
: Ron = 1.31 Ω (max) (@VGS = -4.5 V)
Absolute Maximum Ratings (Ta = 25 °C)
Unit: mm
1.2±0.05
0.8±0.05
Characteristics
Symbol
Rating
Unit
Drain-source voltage
Gate-source voltage
Drain current
DC
Pulse
Drain power dissipation
Channel temperature
Storage temperature range
VDSS
VGSS
ID
IDP
PD (Note1)
Tch
Tstg
-20
±8
-330
-660
150
150
55 to 150
V
V
mA
mW
°C
°C
Note: Using continuously under heavy loads (e.g. the application of
high temperature/current/voltage and the significant change in
temperature, etc.) may cause this product to decrease in the
reliability significantly even if the operating conditions (i.e.
operating temperature/current/voltage, etc.) are within the
absolute maximum ratings.
Please design the appropriate reliability upon reviewing the
Toshiba Semiconductor Reliability Handbook (“Handling
Precautions”/“Derating Concept and Methods”) and individual
reliability data (i.e. reliability test report and estimated failure rate, etc).
Note1: Mounted on an FR4 board
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.585 mm2)
1
23
VESM
1. Gate
2. Source
3. Drain
JEDEC
JEITA
TOSHIBA
2-1L1B
Weight: 1.5 mg (typ.)
Marking
3
Equivalent Circuit (top view)
3
PX
12
12
Handling Precaution
When handling individual devices (which are not yet mounted on a circuit board), ensure that the environment is
protected against static electricity. Operators should wear anti-static clothing, and containers and other objects that come
into direct contact with devices should be made of anti-static materials.
Usage Considerations
Let Vth be the voltage applied between gate and source that causes the drain current (ID) to below 1 mA for the
SSM3J36MFV). Then, for normal switching operation, VGS(on) must be higher than Vth, and VGS(off) must be lower than
Vth. This relationship can be expressed as: VGS(off) < Vth < VGS(on).
Take this into consideration when using the device.
1 2008-06-11




SSM3J36MFV pdf, 반도체, 판매, 대치품
1000
300
Common Source
VDS = -3 V
Ta = 25°C
|Yfs| – ID
100
30
10
-1
-10
-100
-1000
Drain current ID (mA)
C – VDS
100
50
Ciss
30
10
Coss
5 Crss
3 Common Source
Ta = 25°C
f = 1 MHz
VGS = 0 V
1
-0.1
-1
-10
Drain-source voltage VDS (V)
-100
SSM3J36MFV
1000
Common Source
VGS = 0 V
D
100 G
IDR
IDR – VDS
S
10
Ta =100 °C
25 °C
1
25 °C
0.1
0 0.2 0.4 0.6 0.8 1.0 1.2
Drain-source voltage VDS (V)
10000
1000 toff
tf
100 ton
tr
10
-1
t – ID
Common Source
VDD = -10 V
VGS = 0 to -2.5 V
Ta = 25 °C
RG = 50Ω
-10 -100
Drain current ID (mA)
-1000
Dynamic Input Characteristic
-8 Common Source
ID = -0.33 A
Ta = 25°C
-6
-4 VDD =-10V
VDD = - 16 V
-2
0
0 1 23
Total Gate Charge Qg (nC)
PD – Ta
250
Mounted on FR4 board
(25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.585 mm2)
200
150
100
50
0
-40 -20 0 20 40 60 80 100 120 140 160
Ambient temperature Ta (°C)
4 2008-06-11

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관련 데이터시트

부품번호상세설명 및 기능제조사
SSM3J36MFV

Field Effect Transistor

Toshiba Semiconductor
Toshiba Semiconductor

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