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PDF APE8968MP-HF-3 Data sheet ( Hoja de datos )
| Número de pieza | APE8968MP-HF-3 | |
| Descripción | 3A Ultra-low Dropout Regulator | |
| Fabricantes | Advanced Power Electronics | |
| Logotipo |  |
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Advanced Power
Electronics Corp.
APE8968MP-HF-3
3A Ultra-low Dropout Regulator
Features
Description
Ultra-low Dropout of 0.23V (typical) at 3A
Output Current
Low ESR Output Capacitor (compatible
with Multi-layer Chip Capacitors (MLCC))
Reference Voltage of 0.8V
Fast Transient Response
Adjustable Output Voltage using External Resistors
Power-On-Reset Monitoring on Both
VCNTL and VIN Pins
Internal Soft-Start
Under-Voltage Protection
Current-Limit and Thermal Shutdown Protection
Power-OK Output with a Delay Time
RoHS-compliant halogen-free ESOP-8 Package
with Exposed Pad
The APE8968-HF-3 is a 3A ultra-low dropout linear
regulator, originally designed to provide supply voltages
for front-side-bus termination on motherboards and
NB applications. The IC needs two supply voltages, a
control voltage for the circuitry and a main supply voltage for
power conversion, to reduce power dissipation and provide
extremely low dropout. The APE8968-HF-3 integrates many
functions. A Power-On-Reset (POR) circuit monitors both
supply voltages to prevent incorrect operation. Thermal
shutdown and current limit functions protect the device
against thermal and current over-loads. A POK indicates the
output status with a time delay which is set internally. It can
control another converter for power sequencing. The APE8968
can be also be enabled by other power system. Pulling and
holding the EN pin below 0.4V shuts off the output.
The APE8968-HF-3 is available in an ESOP-8 package which
features the small size of an SO-8 with an exposed pad to reduce
the junction-to-case thermal resistance, making it suitable for
2~3W applications.
Typical Application Circuit
1. Using an Output Capacitor with ESR >20mΩ
R3
1k
VCNTL=5V
C1
1uF
ON
OFF
6 VCNTL
7 POK
8 EN
1 GND
VIN 5
VOUT 3
VOUT 4
FB 2
APE8968-3
C2 C3
100uF 0.1uF
VIN=1.5V
Vout=1.2V/3A
R1 C6
1k
12~48nF
C4 C5
220uF 0.1u
R2
2k
2. Using an MLCC as the Output Capacitor
R3
10k
VCNTL=5V
U2
6 VCNTL
VIN 5
ON
C1 OFF
1uF
7 POK
8 EN
1 GND
VOUT 3
VOUT 4
FB 2
APE8968-3
C3
10uF
VIN=1.5V
R1 C6 C5
39k
56pF 10uF
Vout=1.2V/3A
R2
78k
VOUT=VFB*(1+R1/R2)
VFB = 0.8V
©2011 Advanced Power Electronics Corp. USA
www.a-powerusa.com
201103293-3
1/9
1 page  
Advanced Power
Electronics Corp.
APE8968MP-HF-3
Function Descriptions
Power-On-Reset
A Power-On-Reset (POR) circuit monitors both input voltages at VCNTL and VIN pins
to prevent incorrect logic controls. The POR function initiates a soft-start process after the
two supply voltages exceed their rising POR threshold voltages during powering on. The
POR function also pulls low the POK pin regardless of the output voltage when the VCNTL
voltage falls below its falling POR threshold.
Internal Soft-Start
An internal soft-start function controls the slew rate of the output voltage to limit the
current surge at start-up. The typical soft-start interval is about 2ms.
Current Limit
The APE8968-3 monitors the current via the output NMOSFET and limits the maximum
current to prevent damage to the load and the APE8968-3 during overload or short circuit
conditions.
Output Voltage Regulation
An error amplifier working with a temperature compensated 0.8V reference and an
output NMOSFET regulates output to the preset voltage. The error amplifier is designed
with high bandwidth and DC gain, providing very fast transient response and less load
regulation. It compares the reference with the feedback voltage and amplifies the difference
to drive the output NMOSFET which provides load current from VIN to VOUT.
Under Voltage Protection (UVP)
The APE8968-3 monitors the voltage on the FB pin after the soft-start process is finished.
Therefore the UVP is disabled during soft-start. When the voltage on FB pin falls below
the under-voltage threshold, the UVP circuit shuts off the output immediately. After a while,
the APE8968-3 starts a new soft-start to regulate output.
Thermal Shutdown
A thermal shutdown circuit limits the junction temperature of the APE8968-3. When the
junction temperature exceeds +150°C, a thermal sensor turns off the output NMOSFET,
allowing the device to cool down. The regulator regulates the output again through the
initiation of a new soft-start cycle after the junction temperature cools by 50°C, resulting
in pulsed output during continuous thermal overload conditions.
PCB Layout Consideration
It is necessary to solder the exposed pad to either Vin or the Gnd plane as a heat sink and
ensure it has enough pcb copper area to radiate the heat. Input capacitor, output capacitor,
voltage divider and bypass capacitors need to be
placed as close to the IC as possible to decouple
the high frequency ripple and noise.
VIN
CIN
The traces should be kept short and
VIN
wide to minimize the parasitic resistance
and inductance, and the whole
application circuit should be as
close to the load as possible for
VC N TL
excellent load transient response. CCNTL
VCNTL
VOUT
VOUT
COUT
VOUT
C1
R1
FB
GND
R2
©2011 Advanced Power Electronics Corp.U SA
www.a-powerusa.com
5/9
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet APE8968MP-HF-3.PDF ] | |
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