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PDF AN11325 Data sheet ( Hoja de datos )
| Número de pieza | AN11325 | |
| Descripción | 2-way Doherty amplifier | |
| Fabricantes | NXP Semiconductors | |
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AN11325
2-way Doherty amplifier with BLF888A
Rev. 01 — 14 November 2013
Application note
Document information
Info Content
Keywords
BLF888A, Doherty, DVB-T, UHF
Abstract
This document gives a description and measurement results of a 2-way
Doherty amplifier using 2 BLF888A UHF LDMOS transistors.
1 page  
NXP Semiconductors
AN11325
2-way Doherty amplifier with BLF888A
Fig 4.
f = 550 MHz to 750 MHz
m11: f = 650 MHz
m12: f = 600 MHz
m13: f = 700 MHz
Offset line length determination with an ‘open’ Smith chart.
• The same offset lines were used for both Main and Peaking amplifier.
• The ideal offset line of the peaking amplifier is open at the combiner point (see
Figure 4).
• Pulsed measurement (efficiency) at back-off power showed that this was also correct
for the main amplifier.
3.2 Modeling
The characteristics of the offset line can be determined by passive models (equivalent), or
active models of the transistor. Both methods give similar results. Figure 5 shows the
broadband (peaking) amplifier output matching (block X5, BB_output_888A) and the
active models (component X2 and X7). Figure 6 shows the broadband matching
configuration of BLF888A in detail.
AN11325
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 14 November 2013
© NXP B.V. 2013. All rights reserved.
5 of 27
5 Page 
NXP Semiconductors
AN11325
2-way Doherty amplifier with BLF888A
• The offset line length at 675 MHz is not optimum and this will result in slightly lower
efficiency compared to 710 MHz
• The broadband matching of the amplifier blocks has a significant influence on the
measured efficiency
• The broadband amplifiers were not correctly tuned below 500 MHz which influenced
the result of the 500 MHz design at the lower frequencies
• In some measurements, extra attenuation at the input of the main amplifier was added
(parallel 50 resistor to ground). This only gave slightly better results. This was
frequency-dependent due to the changing input matching over frequency. A better
option would be to use an asymmetrical splitter design.
Table 1.
f (MHz)
470
500
500
550
600
650
665
675
675
700
710
710
750
770
770
790
800
860
870
Combiner characteristics
Simulation offset line Peaking amp
Peaking amp
Main amp
Phase offset Length (mm) Length (mm) Length offset Actual length Length offset Actual length
line ()
r = 3.5
r = 2.03
line (mm)
offset line line +90 (mm) offset line +90
(coax)
(mm)
(mm)
18 19 22.40
115.23
175 177 204.71
267.45
200 200 (coaxial)
300 (coaxial)
136 125 144.63
207.23
107 90
104.30
165.38
85 66 76.49
135.58
79 60 69.48
128.01
75
55.8
64.99
55.48
122.80
43 43 (PCB)
117 (PCB)
64
46
53.48
46
110.61
59.9
42.4
49.34
42.40
106.10
43 43 (PCB)
102 (PCB)
40
27
31.19
27
87.30
29.3
19.1
22.26
19.10
77.84
12 12 (PCB)
69 (PCB)
18
11
13.33
11
68.25
12 7.5 8.77 7.5
64.03
159 93
108.14
93
145.59
154 89
103.53
89
140.98
AN11325
Application note
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 14 November 2013
© NXP B.V. 2013. All rights reserved.
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