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PDF LV8206T Data sheet ( Hoja de datos )
| Número de pieza | LV8206T | |
| Descripción | CD and MD System Motor Driver | |
| Fabricantes | Sanyo | |
| Logotipo |  |
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Ordering number : ENN7189
Bi-CMOS LSI
LV8206T CD and MD System Motor Driver
Overview
The LV8206T is a motor driver system IC that integrates all
the motor driver circuits required to implement CD and MD
players. Since the LV8206T includes a 3-phase PWM
spindle motor driver, a sled driver (3-phase stepping motor
driver), and two PWM H-bridge motor driver circuits for
the focus and tracking motors, it can contribute to
miniaturization, thinner form factors, and lower power
consumption in end products.
Direct PWM sensorless drive is adopted in the spindle and
sled drivers for high-efficiency motor drive with a minimal
number of external components.
Package Dimensions
unit: mm
3254-TQFP48
[LV8206T]
Features
• Direct PWM drive (low side control)
• Three-phase full-wave sensorless drive (spindle block)
• Reverse torque braking (spindle block)
• Soft switching drive (spindle block)
• MOS output transistors structure
• Standby mode power saving functions
• FG output
SANYO: TQFP48
Any and all SANYO Semiconductor products described or contained herein do not have specifications
that can handle applications that require extremely high levels of reliability, such as life-support systems,
aircraft's control systems, or other applications whose failure can be reasonably expected to result in
serious physical and/or material damage. Consult with your SANYO Semiconductor representative
nearest you before using any SANYO Semiconductor products described or contained herein in such
applications.
SANYO Semiconductor assumes no responsibility for equipment failures that result from using products
at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor
products described or contained herein.
N2206 / N2503TN (OT) No. 7189 - 1/14
1 page  
Test Circuit Diagram
DSP
VS
LV8206T
VS DSP
DSP
VCC
DSP
VS
DSP
48 47 46 45 44 43 42 41 40 39 38 37
IN1F
IN2R
1 IN1R
RMAX 36
2 CP1
VCO 35
3 CPC1
VCOIN 34
4 CP2
COMIN 33
5 CPC2
FIL 32
6 VG
7 VCC
8 CLK
LV8206T
GND 31
PWM 30
S1 29
9 MODE
S2 28
10 VS3
S3 27
11 BRK
VS 26
12 PGND3
RF 25
SUCO
FG
13 14 15 16 17 18 19 20 21 22 23 24
DSP
VS
Sled motor
DSP
DSP
Spindle
motor
DSP
Insert capacitors between VS and ground and between VCC and ground.
Top view
No. 7189 - 5/14
5 Page 
LV8206T
y S/S and Mute Circuits
The S/S pin (pin 47) is the spindle driver start/stop pin; a high level selects the start state. The MUTE pin (pin 39) applies
to the driver circuits other than the spindle block; a low level selects the muted state. In the muted state, the corresponding
drivers (the H-bridge and 3-phase sled drivers) all go to the high-impedance state, regardless of the input logic. Since the
S/S pin and the MUTE pin operate independently, both the S/S pin and the MUTE pin must be set to the low level to put
the IC in full standby state (power saving mode).
y BRK Circuit
The BRK pin (pin 11) functions to reverse the direction of the spindle driver torque; a low level selects reverse torque
breaking. When the motor speed becomes adequately slow by reverse torque breaking, the IC switches to the short-circuit
braking state and stops the motor. (Note: The IC must not be in the power saving state at this point.)
When using the BRK pin function to stop the motor, if the timing of the switch to short-circuit braking is too early,
excessive motor rotation remains, and problems occur, the value of the RMAX pin (pin 36) resistor must be reduced. Also,
if motor oscillation continues when the motor is nearly stopped, and the IC does not switch to short braking mode, insert
a resistor with a value of a few kΩ at the COM pin. (Note: Verify that inserting this resistor does not adversely affect the
startup characteristics.)
y The CLK and PWM Signals
The LV8206T CLK pin (pin 8) signal is used as the sensorless logic reference clock, for voltage step-up pulses, and for
other purposes. Therefore, it must be provided at all times the IC is in the start state. The CLK input signal must be either
32 or 64 times the frequency of the PWM input signal. The MODE pin (pin 9) selects the relationship between the CLK
and PWM pin frequencies; a low level on the MODE pin (pin 9) selects 64× input, a high level on the MODE pin (pin 9)
selects 32× input. We recommend that the CLK input frequency be less than 6 MHz.
y FG Output Circuit
The FG pin (pin 24) is the spindle block FG output pin. It provides a pulse signal equivalent to that provided by systems
that use three Hall-effect sensors. This output has a MOS circuit structure.
y Spindle Block Position Sensor Comparator Circuit
The spindle block position sensor comparator circuit uses the back EMF generated by motor rotation to detect the rotor
position. The output block power application timing is determined based on the position information acquired by this
circuit. Startup problems due to noise on the comparator inputs can be ameliorated by inserting a capacitor (1000 to
4700 pF) between the COMIN pin (pin 33) and the FIL pin (pin 32). Note that if the value of this capacitor is too large, the
output current application timing may be delayed at higher motor speeds and efficiency may be degraded.
y Charge Pump Circuit
Since the LV8206T has a DMOS (n-channel) output structure, it includes a charge pump based voltage step-up circuit. A
voltage multiplied by a factor of three (or a voltage of about 6.0 V) can be acquired by connecting capacitors between the
CP1 and CPC1 pins and between the CP2 and CPC2 pins. It is desirable that this IC be used with the voltage relationship
between the stepped-up voltage (VG) and the motor supply voltage (VS) meeting the condition VG – VS ≥ 3.0 V. Note
that the IC is designed so that the stepped up voltage (VG) is clamped at about 6.0 VDC. If the stepped-up voltage (VG)
exceeds 6.5 V (VGmax) due to ripple or other cause, the value of the VG pin capacitor must be increased.
Observe the following points if the VG voltage is supplied externally.
— The externally applied VG voltage must not exceed VGmax in the Absolute Maximum Ratings.
— The capacitor between the CP1 and CPC1 pins (pins 2 and 3), and the capacitor between the CP2 and CPC2 pins (pins
4 and 5) are not required.
— The sequence in which the VG voltage is applied requires care. The VG voltage must be applied after VCC, and must
be removed before VCC is cut off.
— Since there is an internal diode between the VCC and VG pins in the IC, a voltage such that VCC > VG must never be
applied to the VG pin.
No. 7189 - 11/14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet LV8206T.PDF ] | |
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