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PDF AT91SAM9G46 Data sheet ( Hoja de datos )
| Número de pieza | AT91SAM9G46 | |
| Descripción | AT91 ARM Thumb-based Microcontrollers | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• 400 MHz ARM926EJ-S™ ARM® Thumb® Processor
– 32 KBytes Data Cache, 32 KBytes Instruction Cache, MMU
• Memories
– 4-port, 4-bank DDR2/LPDDR Controller
– External Bus Interface supporting 4-bank DDR2/LPDDR, SDRAM/LPSDR, Static
Memories, CompactFlash, SLC NAND Flash with ECC
– One 64-KByte internal SRAM, single-cycle access at system speed or processor
speed through TCM interface
– One 64-KByte internal ROM, embedding bootstrap routine
• Peripherals
– LCD Controller supporting STN and TFT displays up to 1280*860
– ITU-R BT. 601/656 Image Sensor Interface
– Dual High Speed USB Host and a High Speed USB Device with On-Chip
Transceivers
– 10/100 Mbps Ethernet MAC Controller
– Two High Speed Memory Card Hosts (SDIO, SDCard, e.MMC and CE ATA)
– AC'97 controller
– Two Master/Slave Serial Peripheral Interfaces
– Two Three-channel 16-bit Timer/Counters
– Two Synchronous Serial Controllers (I2S mode)
– Four-channel 16-bit PWM Controller
– Two Two-wire Interfaces
– Four USARTs with ISO7816, IrDA, Manchester and SPI modes
– 8-channel 10-bit ADC with 4-wire Touch Screen support
• Cryptography
– TRNG True Random Number Generator
– AES256-, 192-, 128-bit Key Algorithm,
– TDES Compliant with FIPS PUB 46-3 Specifications
– SHA (SHA1 and SHA256) Compliant with FIPS Publication 180-2
• System
– 133 MHz twelve 32-bit layer AHB Bus Matrix
– 39 DMA Channels
– Boot from NAND Flash, SDCard, DataFlash® or serial DataFlash
– Reset Controller with on-chip Power-on Reset
– Selectable 32768 Hz Low-power and 12 MHz Crystal Oscillators
– Internal Low-power 32 kHz RC Oscillator
– One PLL for the system and one 480 MHz PLL optimized for USB High Speed
– Two Programmable External Clock Signals
– Advanced Interrupt Controller and Debug Unit
– Periodic Interval Timer, Watchdog Timer, Real Time Timer and Real Time Clock
• I/O
– Five 32-bit Parallel Input/Output Controllers
– 160 Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os with
Schmitt trigger input
• Package
– 324-ball TFBGA, pitch 0.8 mm
AT91 ARM
Thumb-based
Microcontrollers
AT91SAM9G46
Preliminary
Summary
NOTE: This is a summary document.
The complete document is available
under NDA. For more information,
please contact your local Atmel sales
office.
11028BS–ATARM–26-Apr-10
1 page  
AT91SAM9G46
Table 3-1. Signal Description List (Continued)
Signal Name
Function
Type
Active
Level
Shutdown, Wakeup Logic
Reference
Voltage
SHDN
Shut-Down Control
Output
VDDBU
WKUP
TCK
TDI
TDO
TMS
JTAGSEL
RTCK
NRST
TST
NTRST
BMS
DRXD
DTXD
IRQ
FIQ
PA0 - PA31
PB0 - PB31
Wake-Up Input
Test Clock
Test Data In
Test Data Out
Test Mode Select
JTAG Selection
Return Test Clock
Microcontroller Reset(2)
Input
ICE and JTAG
Input
Input
Output
Input
Input
Output
Reset/Test
I/O Low
VDDBU
VDDIOP0
VDDIOP0
VDDIOP0
VDDIOP0
VDDBU
VDDIOP0
VDDIOP0
Test Mode Select
Input
VDDBU
Test Reset Signal
Input
VDDIOP0
Boot Mode Select
Input
VDDIOP0
Debug Unit - DBGU
Debug Receive Data
Input
(1)
Debug Transmit Data
Output
(1)
Advanced Interrupt Controller - AIC
External Interrupt Input
Input
(1)
Fast Interrupt Input
Input
(1)
PIO Controller - PIOA- PIOB - PIOC - PIOD - PIOE
Parallel IO Controller A
I/O
(1)
Parallel IO Controller B
I/O
(1)
Comments
Driven at 0V only.
0: The device is in backup
mode
1: The device is running (not in
backup mode).
Accept between 0V and
VDDBU.
No pull-up resistor, Schmitt
trigger
No pull-up resistor, Schmitt
trigger
No pull-up resistor, Schmitt
trigger
Pull-down resistor (15 kΩ).
Open-drain output,
Pull-Up resistor (100 kΩ),
Schmitt trigger
Pull-down resistor (15 kΩ),
Schmitt trigger
Pull-Up resistor (100 kΩ),
Schmitt trigger
must be connected to GND or
VDDIOP.
Pulled-up input at reset
(100kΩ)(3), Schmitt trigger
Pulled-up input at reset
(100kΩ)(3), Schmitt trigger
11028BS–ATARM–26-Apr-10
5
5 Page 
AT91SAM9G46
4. Package and Pinout
The AT91SAM9G46 is delivered in a 324-ball TFBGA package.
4.1 Mechanical Overview of the 324-ball TFBGA Package
Figure 4-1 shows the orientation of the 324-ball TFBGA Package
Figure 4-1. Orientation of the 324-ball TFBGA Package
Bottom VIEW
V
U
T
R
P
N
M
L
K
J
H
G
F
E
D
C
B
A
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
11028BS–ATARM–26-Apr-10
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AT91SAM9G46.PDF ] | |
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