Datasheet.kr   

HC-55564 데이터시트 PDF




Intersil Corporation에서 제조한 전자 부품 HC-55564은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 HC-55564 자료 제공

부품번호 HC-55564 기능
기능 Continuously Variable Slope Delta-Modulator (CVSD)
제조업체 Intersil Corporation
로고 Intersil Corporation 로고


HC-55564 데이터시트 를 다운로드하여 반도체의 전기적 특성과 매개변수에 대해 알아보세요.



전체 9 페이지수

미리보기를 사용할 수 없습니다

HC-55564 데이터시트, 핀배열, 회로
Low Bit Rate Voiceband Encoders/Decoder
February
Semiconductor
1999
NO
Call
CRoeErnOCetrOBmaSMlaOAiMl:pLEpEcNlTeiDcnEaEtaPtDipoRpRnO@sEDP1hUL-aC8Ar0rTCi0sE-.4cM4o2Em-N7T747
HC-55564
Continuously Variable
Slope Delta-Modulator (CVSD)
[ /Title
(HC-
55564
)
/Sub-
ject
(Con-
tinu-
ously
Vari-
able
Slope
Delta-
Modu-
lator
(CVS
D))
/
Autho
r ()
/Key-
words
(Har-
ris
Semi-
con-
ductor
, Tele-
com,
SLICs
,
SLAC
s,
Tele-
phone,
Tele-
phony,
Features
Description
• All Digital
• Requires Few External Parts
• Low Power Drain: 1.5mW Typical From Single 4.5V
To 6V Supply
• Time Constants Determined by Clock Frequency;
No Calibration or Drift Problems: Automatic Offset
Adjustment
• Half Duplex Operation Under Digital Control
• Filter Reset Under Digital Control
• Automatic Overload Recovery
• Automatic “Quiet” Pattern Generation
• AGC Control Signal Available
Applications
• Voice Transmission Over Data Channels (Modems)
• Voice/Data Multiplexing (Pair Gain)
• Voice Encryption/Scrambling
• Voicemail
• Audio Manipulations: Delay Lines, Time Compression,
Echo Generation/Suppression, Special Effects, etc.
• Pagers/Satellites
• Data Acquisition Systems
• Voice I/O for Digital Systems and Speech Synthesis
Requiring Small Size, Low Weight, and Ease of
Reprogrammability
• Related Literature
- AN607, Delta Modulation for Voice Transmission
The HC-55564 is a half duplex modulator/demodulator CMOS
intergrated circuit used to convert voice signals into serial NRZ
digital data and to reconvert that data into voice. The conver-
sion is by delta-modulation, using the Continuously Variable
Slope (CVSD) method of modulation/demodulation.
While the signals are compatible with other CVSD circuits, the inter-
nal design is unique. The analog loop filters have been replaced by
very low power digital filters which require no external timing compo-
nents. This approach allows inclusion of many desirable features
which would be difficult to implement using other approaches.
The fundamental advantages of delta-modulation, along with its
simplicity and serial data format, provide an efficient (low data
rate/low memory requirements) method for voice digitization.
The HC-55564 is usable from 9kbits/s to above 64kbps. See the
Harris Military databook for a MIL-STD-883C compliant CVSD.
Application Note 607.
Ordering Information
PART
NUMBER
HC1-55564-2
HC1-55564-5
HC1-55564-9
HC3-55564-5
HC9P55564-5
TEMP.
RANGE (oC)
PACKAGE
PKG. NO.
-55 to 125 14 Ld CERDIP
F14.3
0 to 75 14 Ld CERDIP
F14.3
-40 to 85 14 Ld CERDIP
F14.3
0 to 75 14 Ld PDIP
E14.3
0 to 75 16 Ld Plastic SOIC (W) M16.3
Pinouts
HC-55564
(PDIP, CERDIP)
TOP VIEW
VDD 1
ANALOG GND 2
AOUT 3
AGC 4
AIN 5
NC 6
NC 7
14 DIG OUT
13 FZ
12 DIG IN
11 APT
10 ENC/DEC
9 CLOCK
8 DIG GND
HC-55564
(SOIC)
TOP VIEW
VDD 1
ANALOG GND 2
AOUT 3
AGC 4
AIN 5
NC 6
NC 7
NC 8
16 DIG OUT
15 FZ
14 DIG IN
13 APT
12 ENC/DEC
11 CLOCK
10 DIG GND
9 NC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1999
1
File Number 2889.5




HC-55564 pdf, 반도체, 판매, 대치품
Timing Waveforms
SAMPLING CLOCK
HC-55564
FZ/APT
DEC/ENC
DIGITAL NRZ IN
tDS
1
0
DIGITAL NRZ OUT
tDS: DATA SET UP TIME 100ns TYPICAL
1
0
01
FIGURE 2. CVSD TIMING DIAGRAM
1
Interface Circuit for HC-55564 CVSD (DIP Pin Numbers Shown)
AUDIO SOURCE
RC
INPUT
LEVEL ADJUST
RA, RB, CA
OPTIONAL
CA
RA
5V
-5V
0.1µ
1
2
3
4
RB 5
9
8
TP3040
VFX1+
VFX1-
GSX
PWR0+
VFX0
VFRI
VFR0
PWRI
VCC
VBB
CLK0
PDN
GNDA CLK GNDD
6
16
10
14
13
11
0.1µ 15 12
AUDIO OUT
0.1µ
0.1µ
RD (NOTE)
EXTERNAL
CONTROL
HC-55564
5 AIN
3 AOUT
1
VDD
0.1µ
AGC
DOUT
DIN
FZ
APT
E/D
8 DIGITAL ANALOG
GND
GND
CLK
4
14
12
13
11
10
2
9
(TO DATA I/F)
(FROM DATA I/F)
EXTERNAL
CONTROL
CLK GEN
÷n
NOTE: RD = 100kto 1M
CVSD Hookup for Evaluation
The circuit in Figure 3 is sufficient to evaluate the voice qual-
ity of the CVSD, since when encoding, the feedback signal at
the audio output pin is the reconstructed audio input signal.
CVSD design considerations are as follows:
1. Care should be taken in layout to maintain isolation
between analog and digital signal paths for proper noise
consideration.
2. Power supply decoupling is necessary as close to the
device as possible. A 0.1µF should be sufficient.
3. Ground, then power, must be present before any input sig-
nals are applied to the CVSD. Failure to observe this may
cause a latchup condition which may be destructive.
Latchup may be removed by cycling the power off/on. A
power-up reset circuit may be used that strobes Force
Zero (Pin 13) during power-up as follows:
4. Analog (signal) ground (Pin 2) should be externally tied to
Digital GND (Pin 8) and power supply ground. It is recom-
mended that the AIN and AOUT ground returns connect
only to Pin 2.
5. Digital inputs and outputs are compatible with standard
CMOS logic using the same supply voltage. All unused
logic inputs must be tied to the appropriate logic level for
desired operation. It is recommended that unused inputs
tied high be done so through a pull-up resistor (1kto
10k). TTL outputs will require 1kpull-up resistors. Pins
4 and 14 will each drive CMOS logic or one low power TTL
input.
6. Since the Audio Out pins are internally DC biased to VDD/2,
AC coupling is required. In general, a value of 0.1µF is suffi-
cient for AC coupling of the CVSD audio pins to a filter circuit.
7. The AGC output may be externally integrated to drive an
AGC pre-amp, or it could drive an LED indicator through a
buffer to indicate proper speaking volume.
VDD
R
(13)
C FZ
4

4페이지










HC-55564 전자부품, 판매, 대치품
HC-55564
Ceramic Dual-In-Line Frit Seal Packages (CERDIP)
-A- -D-
E
-B-
bbb S C A - B S D S
c1 LEAD FINISH
BASE
METAL
(c)
b1
MM
(b)
SECTION A-A
BASE
PLANE
SEATING
PLANE
S1
b2
b
D
AA
e
Q
-C- A
L
eA/2
α
eA
c
ccc M C A - B S D S
aaa M C A - B S D S
NOTES:
1. Index area: A notch or a pin one identification mark shall be locat-
ed adjacent to pin one and shall be located within the shaded
area shown. The manufacturer’s identification shall not be used
as a pin one identification mark.
2. The maximum limits of lead dimensions b and c or M shall be
measured at the centroid of the finished lead surfaces, when
solder dip or tin plate lead finish is applied.
3. Dimensions b1 and c1 apply to lead base metal only. Dimension
M applies to lead plating and finish thickness.
4. Corner leads (1, N, N/2, and N/2+1) may be configured with a
partial lead paddle. For this configuration dimension b3 replaces
dimension b2.
5. This dimension allows for off-center lid, meniscus, and glass
overrun.
6. Dimension Q shall be measured from the seating plane to the
base plane.
7. Measure dimension S1 at all four corners.
8. N is the maximum number of terminal positions.
9. Dimensioning and tolerancing per ANSI Y14.5M - 1982.
10. Controlling dimension: INCH.
F14.3 MIL-STD-1835 GDIP1-T14 (D-1, CONFIGURATION A)
14 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A
- 0.200 - 5.08
-
b
0.014
0.026
0.36
0.66
2
b1
0.014
0.023
0.36
0.58
3
b2
0.045
0.065
1.14
1.65
-
b3
0.023
0.045
0.58
1.14
4
c
0.008
0.018
0.20
0.46
2
c1
0.008
0.015
0.20
0.38
3
D - 0.785 - 19.94 5
E
0.220
0.310
5.59
7.87
5
e 0.100 BSC
2.54 BSC
-
eA 0.300 BSC
7.62 BSC
-
eA/2
0.150 BSC
3.81 BSC
-
L
0.125
0.200
3.18
5.08
-
Q
0.015
0.060
0.38
1.52
6
S1 0.005 - 0.13
-
α 90o 105o 90o 105o
7
-
aaa
- 0.015 - 0.38
-
bbb
- 0.030 - 0.76
-
ccc
- 0.010 - 0.25
-
M
-
0.0015
-
0.038
2, 3
N 14
14 8
Rev. 0 4/94
7

7페이지


구       성 총 9 페이지수
다운로드[ HC-55564.PDF 데이터시트 ]

당사 플랫폼은 키워드, 제품 이름 또는 부품 번호를 사용하여 검색할 수 있는

포괄적인 데이터시트를 제공합니다.


구매 문의
일반 IC 문의 : 샘플 및 소량 구매
-----------------------------------------------------------------------

IGBT, TR 모듈, SCR 및 다이오드 모듈을 포함한
광범위한 전력 반도체를 판매합니다.

전력 반도체 전문업체

상호 : 아이지 인터내셔날

사이트 방문 :     [ 홈페이지 ]     [ 블로그 1 ]     [ 블로그 2 ]



관련 데이터시트

부품번호상세설명 및 기능제조사
HC-55564

Continuously Variable Slope Delta-Modulator (CVSD)

Intersil Corporation
Intersil Corporation

DataSheet.kr       |      2020   |     연락처      |     링크모음      |      검색     |      사이트맵