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PDF HV050V01-100 Data sheet ( Hoja de datos )

Número de pieza HV050V01-100
Descripción TFT LCD
Fabricantes BOE 
Logotipo BOE Logotipo



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No Preview Available ! HV050V01-100 Hoja de datos, Descripción, Manual

PROPRIETARY NOTE
THIS SPECIFICATION IS THE PROPERTY OF BOE HYDIS AND SHALL NOT
BE REPRODUCED OR COPIED WITHOUT THE WRITTEN PERMISSION OF
BOE HYDIS AND MUST BE RETURNED TO BOE HYDIS UPON ITS
REQUEST.
TITLE : HV050V01-100
Product Specification
Rev. O
BOE HYDIS TECHNOLOGY
SPEC. NUMBER PRODUCT GROUP
S864-1268
TFT-LCD PRODUCT
B2005-C001-A (1/3)
REV. ISSUE DATE
O 2006.01.25
PAGE
1 OF 38
A4(210 X 297)

1 page




HV050V01-100 pdf
PRODUCT GROUP
REV. ISSUE DATE
TFT-LCD PRODUCT
O 2006.01.25
1.4 General Specifications
The followings are general specifications at the model HV050V01-100.
Parameter
Table 1. General Specifications
Specification
Unit
Panel Outline Dimension
CF Outline Dimension
110.9(H) × 87.45(V)
108.7(H) × 83.25(V)
mm
mm
Active area
Number of pixels
Pixel pitch
101.76(H) X 76.32(V)
640(H) × 480(V)
0.0159(H) × 0.0159(V)
mm
pixels
mm
Pixel arrangement
Display mode
Operation Type
Surface treatment
Liquid Crystal clearing
temperature
RGB Vertical stripe
Normally Black (FFS)
Portrait Type
AR
103
-
-
-
-
Color filter chromaticity
x=0.312, y=0.342
Panel Transmittance
6.0
ITO Resistance
25 ~ 40
*Note 1) This value includes the recycling factor.
-
%
Ohm/
Remark
O-Mode
Note. 1
Note. 2
2.0 ENVIRONMENTAL ABSOLUTE MAXIMUM RATINGS
The followings are maximum values which, if exceed, may cause faulty operation or damage to
the unit.
Table 2. Environmental Maximum Specifications
Parameter
Symbol
Min
Max Unit Remark
Operating Temperature
TOP
-20
+85 Note. 1
Note. 1) As compromised with Customer, D-IC and Polarizer are excluded within the range of
guarantee for Operating Temperature.
D-IC : -10 ~ 75, Polarizer : -20 ~ 80
SPEC. NUMBER
S864-1268
B2005-C001-A (3/3)
SPEC. TITLE
HV050V01-100 Product Specification
PAGE
5 OF 38
A4(210 X 297)

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HV050V01-100 arduino
PRODUCT GROUP
TFT-LCD PRODUCT
REV.
O
ISSUE DATE
2006.01.25
6.0 X-Driver IC
6.1.Pin Description
Pin Name
I/O
LVCLKA/B
I
LVCLKAT1/BT1
LVCLKAT2/BT2
O
LV0A/B to LV3A/B
LV0AT1/BT1
to LV3AT1/BT1
LV0AT2/BT2
to LV3AT2/BT2
XLR
XLR_LV
EIO1 , EIO2
O
O
I
I
I/O
TP1_1
TP1_2
I
POL_1
POL_2
LP_1
LP_2
I
I
SQINV
I
LCH
VBDATA
O
I
VLB
I
TEST1
TEST2
VCOM
VCOM2
I
I/O
Description
Clock (mini-LVDS)
Clock (mini-LVDS)
Display Data (mini-
LVDS)
Display data
(mini-LVDS)
Shift direction
mini-LVDS output
control
Start pulse
Input mode and
output timing
control
Polarity control
Low power mode
selection
Inversion mode
selection
Drivability
control
Output BIAS
current control
(option pin)
Rx BIAS current
control (option pin)
Test
(option pin)
VCOM through
terminal
Function
Shift clock input (Reeiver)
Getting a clock by mini-LVDS signal.
Shift clock output(Transmitter).
Output of same clock from receiver input.
The function is controlled by XLR_LV.
Display data input (Receiver).
Getting a display data with gray-scale data (6bit)
and control signal. (RST=reset).
Display data output (Transmitter).
Output of same data from receiver input.
The function is controlled by XLR_LV.
Control the direction of the loaded data at the
shift-register.
Control output definition of mini-LVDS display
data and clock terminals.
Input/Output definition of address shift-register
Change the input mode, latched the registered
data and transfer to DAC at the rising edge.
And supplied voltage to LCD pixel is output at
falling edge.
TP1_1 or TP1_2 is selected by XLR_LV.
Control the polarity of the output.
Define by the POL signal at TP1 as "H".
TP1_1 or TP1_2 is selected by XLR_LV.
Decrease the charge/discharge current to output load.
LP_1/2=H : Low power mode
LP_1/2=L : Normal mode
TP1_1 or TP1_2 is selected by XLR_LV.
Select inversion mode between dot inversion or
square inversion.
SQINV=L : dot inversion
SQINV=H :square inversion
Control LCD output drivability.
LCH=H : Normal mode
LCH=L : Light load mode
Control output BIAS current
VBDATA=L : default
VBDATA=H : more current mode
Control mini-LVDS receiver's BIAS current.
VLB=L : default
For testing
Both TEST1 and TEST2 should be connected to
VSS2* for the normal operation.
Each VCOM1 and VCOM2 are connected inside driver IC.
SPEC. NUMBER
S864-1268
B2005-C001-A (3/3)
SPEC. TITLE
HV050V01-100 Product Specification
PAGE
11 OF 38
A4(210 X 297)

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