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M220Z3-LA1 PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 M220Z3-LA1
기능 TFT LCD Module
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M220Z3-LA1 데이터시트, 핀배열, 회로
PRODUCT SPECIFICATION
Doc. Number :
Tentative Specification
Preliminary Specification
Approval Specification
MODEL NO.: M220Z3
SUFFIX: LA1 (C3/C4 ver.)
Customer: Common
APPROVED BY
SIGNATURE
wwwNwamew/wTitle..jjxxllccdd..ccoomm
Note
Please return 1 copy for your confirmation with your
signature and comments.
Approved By Checked By
Prepared By
2010.06.18
Version 3.0
18 June 2010
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited.
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M220Z3-LA1 pdf, 반도체, 판매, 대치품
PRODUCT SPECIFICATION
Version
3.0
Date
June.18, 2010
REVISION HISTORY
Page
All
Description
Spec Ver.3.0 was first issued.
wwwwww..jjxxllccdd..ccoomm
Version 3.0
22 June 2010
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited.
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M220Z3-LA1 전자부품, 판매, 대치품
PRODUCT SPECIFICATION
4. ELECTRICAL SPECIFICATIONS
4.1 FUNCTION BLOCK DIAGRAM
4.2. INTERFACE CONNECTIONS
PIN ASSIGNMENT
Pin Name
wwwwww..jjxxllccdd..ccoomm1 RXO0-
Description
Negative LVDS differential data input. Channel O0 (odd)
2 RXO0+
Positive LVDS differential data input. Channel O0 (odd)
3 RXO1-
Negative LVDS differential data input. Channel O1 (odd)
4 RXO1+
Positive LVDS differential data input. Channel O1 (odd)
5 RXO2-
6 RXO2+
7 GND
8 RXOC-
Negative LVDS differential data input. Channel O2 (odd)
Positive LVDS differential data input. Channel O2 (odd)
Ground
Negative LVDS differential clock input. (odd)
9 RXOC+
10 RXO3-
11 RXO3+
12 RXE0-
13 RXE0+
14 GND
15 RXE1-
Positive LVDS differential clock input. (odd)
Negative LVDS differential data input. Channel O3(odd)
Positive LVDS differential data input. Channel O3 (odd)
Negative LVDS differential data input. Channel E0 (even)
Positive LVDS differential data input. Channel E0 (even)
Ground
Negative LVDS differential data input. Channel E1 (even)
16 RXE1+
17 GND
Positive LVDS differential data input. Channel E1 (even)
Ground
18 RXE2-
19 RXE2+
20 RXEC-
21 RXEC+
Negative LVDS differential data input. Channel E2 (even)
Positive LVDS differential data input. Channel E2 (even)
Negative LVDS differential clock input. (even)
Positive LVDS differential clock input. (even)
22 RXE3-
23 RXE3+
24 GND
Negative LVDS differential data input. Channel E3 (even)
Positive LVDS differential data input. Channel E3 (even)
Ground
25 NC
For LCD internal use only, Do not connect
Version 3.0
22 June 2010
The copyright belongs to CHIMEI InnoLux. Any unauthorized use is prohibited.
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