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PDF VGG644804-6UFLWB Data sheet ( Hoja de datos )
| Número de pieza | VGG644804-6UFLWB | |
| Descripción | LCD Module | |
| Fabricantes | EVERVISION | |
| Logotipo |  |
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EVERVISION
MODEL NO.
VGG644804-6UFLWB SPEC SAMPLE
PAGE
5
4. Application
This specification is applied to the 5.7 inch VGA supported TFT-LCD module, and
can display true 262,144 colors(6 bit/ color). The module is designed for OA, Car TV
application and other electronic products which require flat panel display of digital signal
interface. This module is composed of a 5.7”TFT-LCD panel, a driver circuit and LED
backlight unit and used as the input devices for general electric appliances via both
finger and pen-entry.
5. Features
- VGA (640×480 pixels) resolution.
- LVDS Receiver 18 bit Interface
- Dot inversion mode with stripe type.
- Transparent Touch panel
z 4-Wire
z Analog Resistive
6. General Specifications
Item
Screen Size
Display Format
Active Area
Dot Size
Pixel Configuration
Display Mode
Surface Treatment
Viewing Direction
Outline Dimension
LVDS Receiver IC
Weight
Specifications
5.7 (Diagonal)
640RGB(H)×480(V)
115.2(H)×86.4(V)
0.060(H)×0.180(V)
RGB Vertical Stripe
TN Type
Transmissive Mode
Normally White
Anti-Glare and Hard Coating(3H)
6 O’clock
(The Gray Inversion will appear at this direction)
144.0(W)×104.6(H)×14.5(D)
THine THC63LVDF84A
194
Unit
inch
dot
mm
mm
-
-
-
-
mm
-
g
5 Page 
EVERVISION
MODEL NO.
VGG644804-6UFLWB SPEC SAMPLE
PAGE
11
10. Input / Output Terminals Pin Assignment
10.1 TFT-LCD Module
Connector: HIROSE DF19G-20P-1H
Pin No. Symbol I/O
Description
1 VCC I +3.3V power supply
2 VCC I +3.3V power supply
3 VSS I Ground
4 VSS I Ground
5
RIN0-
I Negative LVDS differential data input
6
RIN0+
I Positive LVDS differential data input
7 VSS I Ground
8
RIN1-
I Negative LVDS differential data input
9
RIN1+
I Positive LVDS differential data input
10 VSS I Ground
11
RIN2-
I Negative LVDS differential data input
12
RIN2+
I Positive LVDS differential data input
13 VSS I Ground
14
RCLK-
I Negative LVDS differential clock input
15
RCLK+
I Positive LVDS differential clock input
16 VSS I Ground
17 NC I Not connection
18 NC I Not connection
19
REV
I
Selection signal for horizontal/ vertical scanning direction.
Note (1)
20 VSS I Ground
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet VGG644804-6UFLWB.PDF ] | |
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