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PDF AA090ME01-T1 Data sheet ( Hoja de datos )

Número de pieza AA090ME01-T1
Descripción WVGA Display Module
Fabricantes Mitsubishi 
Logotipo Mitsubishi Logotipo



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No Preview Available ! AA090ME01-T1 Hoja de datos, Descripción, Manual

TENTATIVE
All information in this technical data sheet is tentative
and subject to change without notice.
9.0” WVGA
TECHNICAL SPECIFICATION
AA090ME01--T1
MITSUBISHI ELECTRIC Corp.
MITSUBISHI
(1/29)
Date: Jun.14,’11
AA090ME01--T1_02_00

1 page




AA090ME01-T1 pdf
3. ABSOLUTE MAXIMUM RATINGS
ITEM
SYMBOL
MIN.
MAX.
UNIT
Power Supply Voltage for LCD
VCC
0
4.0
V
Logic Input Voltage
VI
0.3 VCC+0.3
V
Backlight (LED) Current
IF 0 180 mA
Touch Panel Voltage
TPV
--
7.0
V
Operation Temperature (Touch Panel) Note 1,2) Top(TouchPanel)
20
70
°C
Operation Temperature (Ambient) Note 2)
Top(Ambient)
20
70
°C
Storage Temperature
Note 2)
Tstg 30
80
°C
[Note]
1) Measured at the center of active area and at the center of panel back surface
2) Top,Tstg 40°C : 90%RH max. without condensation
Top,Tstg > 40°C : Absolute humidity shall be less than the value of 90%RH at 40°C without
condensation.
4. ELECTRICAL CHARACTERISTICS
(1) TFT-LCD
ITEM
SYMBOL MIN.
Power Supply Voltages for LCD
Power Supply Currents for LCD
Permissive Input Ripple Voltage
Logic Input Voltage
High
Low
VCC
ICC
VRP
VIH
VIL
3.0
--
--
0.8×VCC
0
*1) Power and signals sequence:
t1 10 ms
0 < t2 50 ms
0 < t3 50 ms
200 ms t4
200 ms t5
0 t6
LCD Power Supply
0.9VCC
Logic Signal
0.1VCC
VCC
data
TYP.
3.3
250
--
--
--
Ambient temperature: Ta = 25°C
MAX. UNIT
Remarks
3.6 V
*1)
410 mA
*2)
100 mVp-p VCC = +3.3V
VCC
V MODE, SC
0.2×VCC
V
MODE, SC
0.9VCC
0.1VCC 0.1VCC
t1 t2
t3 t4
Backlight Power Supply
t5 t6
data: RGB DATA, DCLK, DENA, MODE, SC
MITSUBISHI
(5/29)
AA090ME01--T1_02_00

5 Page





AA090ME01-T1 arduino
6. INTERFACE TIMING
LVDS transmitter input signal
(1) Timing Specifications
ITEM
SYMBOL MIN
TYP
MAX
UNIT
Frequency
DCLK Period
fCLK
tCLK
25
22.2
30.4
32.9
45
40
MHz
ns
Active Time
tHA 800 800 800 tCLK
Blanking Time
Horizontal
Frequency
tHB
fH
20 160
26.4 31.7
--
45
tCLK
kHz
DENA
Period
Active Time
tH 22.2 31.6 37.9
tVA 480 480 480
μs
tH
Vertical Blanking Time
tVB
3
48 --
tH
Frequency
fV 55 60 75 Hz
Period
tV 13.3 16.7 18.2 ms
[Note]
1) DENA (Data Enable) should always be positive polarity as shown in the timing specification.
2) DCLK should appear during all invalid period.
3) LVDS timing follows the timing specifications of LVDS receiver IC: THC63LVDF84B(Thine).
4) In case of blanking time fluctuation, please satisfy following condition.
tVBn > tVBn-1 3(tH)
MITSUBISHI
(11/29)
AA090ME01--T1_02_00

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