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부품번호 | MX25L12835F 기능 |
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기능 | 3V 128M-BIT [x 1/x 2/x 4] CMOS MXSMIO | ||
제조업체 | Macronix | ||
로고 | |||
전체 30 페이지수
MX25L12835F
MX25L12835F
DATASHEET
P/N: PM1795
MX25L12835F
1. FEATURES
3V 128M-BIT [x 1/x 2/x 4] CMOS MXSMIO (SERIAL MULTI I/O)
FLASH MEMORY
GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
• 128Mb: 134,217,728 x 1 bit structure or 67,108,864 x 2 bits (two I/O mode) structure or 33,554,432 x 4 bits (four
I/O mode) structure
• Protocol Support
- Single I/O, Dual I/O and Quad I/O
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is from 2.3V to 2.5V
• Fast read for SPI mode
- Support clock frequency up to 133MHz for all protocols
- Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions.
- Configurable dummy cycle number for fast read operation
• Quad Peripheral Interface (QPI) available
• Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each
- Any Block can be erased individually
• Programming :
- 256byte page buffer
- Quad Input/Output page program(4PP) to enhance program performance
• Typical 100,000 erase/program cycles
• 20 years data retention
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection
The BP0-BP3 and T/B status bit defines the size of the area to be protection against program and erase instruc-
tions
- Advanced sector protection function (Solid and Password Protect)
• Additional 4K bit security OTP
- Features unique identifier
- factory locked identifiable, and customer lockable
• Command Reset
• Program/Erase Suspend and Resume operation
• Electronic Identification
- JEDEC 1-byte manufacturer ID and 2-byte device ID
- RES command for 1-byte Device ID
- REMS command for 1-byte manufacturer ID and 1-byte device ID
• Support Serial Flash Discoverable Parameters (SFDP) mode
HARDWARE FEATURES
• SCLK Input
- Serial clock input
P/N: PM1795
REV. 1.3, OCT. 31, 2013
4
4페이지 3. PIN CONFIGURATIONS
8-PIN SOP (200mil)
CS#
SO/SIO1
WP#/SIO2
GND
1
2
3
4
8 VCC
7 RESET#/SIO3
6 SCLK
5 SI/SIO0
16-PIN SOP (300mil)
DNU/SIO3
VCC
RESET#
NC
NC
NC
CS#
SO/SIO1
1
2
3
4
5
6
7
8
16 SCLK
15 SI/SIO0
14 NC
13 NC
12 NC
11 NC
10 GND
9 WP#/SIO2
8-WSON (6x5mm, 8x6mm)
CS#
SO/SIO1
WP#/SIO2
GND
1
2
3
4
8 VCC
7 RESET#/SIO3
6 SCLK
5 SI/SIO0
MX25L12835F
4. PIN DESCRIPTION
SYMBOL DESCRIPTION
CS# Chip Select
Serial Data Input (for 1 x I/O)/ Serial
SI/SIO0 Data Input & Output (for 2xI/O or 4xI/O
read mode)
Serial Data Output (for 1 x I/O)/ Serial
SO/SIO1 Data Input & Output (for 2xI/O or 4xI/O
read mode)
SCLK Clock Input
Write protection: connect to GND or
WP#/SIO2 Serial Data Input & Output (for 4xI/O
read mode)
Hardware Reset Pin Active low or
RESET#/SIO3 Serial Data Input & Output (for 4xI/O
read mode)
VCC
+ 3V Power Supply
GND
Ground
NC No Connection
DNU
Do not use
Notes:
1. RESET# pin has internal pull up.
2. When using 1I/O or 2I/O (QE bit not enable), the
DNU/SIO3 pin of 16SOP can not connect to GND.
Recommend to connect this pin to VCC or floating.
P/N: PM1795
REV. 1.3, OCT. 31, 2013
7
7페이지 | |||
구 성 | 총 30 페이지수 | ||
다운로드 | [ MX25L12835F.PDF 데이터시트 ] |
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부품번호 | 상세설명 및 기능 | 제조사 |
MX25L12835E | 128M-BIT [x 1/x 2/x 4] CMOS MXSMIO | Macronix |
MX25L12835F | 3V 128M-BIT [x 1/x 2/x 4] CMOS MXSMIO | Macronix |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |