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MJE13007G PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 MJE13007G
기능 NPN Bipolar Power Transistor
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MJE13007G 데이터시트, 핀배열, 회로
MJE13007G
SWITCHMODE
NPN Bipolar Power Transistor
For Switching Power Supply Applications
The MJE13007G is designed for highvoltage, highspeed power
switching inductive circuits where fall time is critical. It is particularly
suited for 115 and 220 V SWITCHMODE applications such as
Switching Regulators, Inverters, Motor Controls, Solenoid/Relay
drivers and Deflection circuits.
Features
SOA and Switching Applications Information
Standard TO220
These Devices are PbFree and are RoHS Compliant*
Complementary to the MJE5850 through MJE5852 Series
MAXIMUM RATINGS
Rating
Symbol Value
Unit
CollectorEmitter Sustaining Voltage
CollectorBase Breakdown Voltage
EmitterBase Voltage
Collector Current Continuous
Collector Current Peak (Note 1)
Base Current
Continuous
Base Current
Peak (Note 1)
Emitter Current Continuous
Emitter Current Peak (Note 1)
Total Device Dissipation @ TC = 25_C
Derate above 25°C
VCEO
VCES
VEBO
IC
ICM
IB
IBM
IE
IEM
PD
400 Vdc
700 Vdc
9.0 Vdc
8.0 Adc
16 Adc
4.0 Adc
8.0 Adc
12 Adc
24 Adc
80 W
0.64 W/_C
Operating and Storage Temperature
TJ, Tstg 65 to 150 _C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%.
THERMAL CHARACTERISTICS
Characteristics
Symbol
Max
Unit
Thermal Resistance, JunctiontoCase
RqJC
1.56 _C/W
Thermal Resistance, JunctiontoAmbient RqJA
62.5 _C/W
Maximum Lead Temperature for Soldering
Purposes 1/8from Case for 5 Seconds
TL
260 _C
*Measurement made with thermocouple contacting the bottom insulated mounting
surface of the package (in a location beneath the die), the device mounted on a
heatsink with thermal grease applied at a mounting torque of 6 to 8lbs.
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2013
August, 2013 Rev. 8
1
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POWER TRANSISTOR
8.0 AMPERES
400 VOLTS 80 WATTS
COLLECTOR
2,4
1
BASE
3
EMITTER
4
TO220AB
CASE 221A09
STYLE 1
123
MARKING DIAGRAM
MJE13007G
AY WW
A = Assembly Location
Y = Year
WW = Work Week
G = PbFree Package
ORDERING INFORMATION
Device
Package
Shipping
MJE13007G
TO220
(PbFree)
50 Units / Rail
Publication Order Number:
MJE13007/D




MJE13007G pdf, 반도체, 판매, 대치품
MJE13007G
100
50 Extended SOA @ 1 ms, 10 ms
20
10
5
2 TC = 25°C DC
1
0.5
10 ms
1 ms
5 ms
1 ms
0.2
0.1
0.05
0.02
0.01
10
BONDING WIRE LIMIT
THERMAL LIMIT
SECOND BREAKDOWN LIMIT
CURVES APPLY BELOW
RATED VCEO
20 30 50 70 100 200 300
500 1000
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 6. Maximum Forward Bias
Safe Operating Area
10
8
6 TC 100°C
GAIN 4
LC = 500 mH
4
2
VBE(off)
-5 V
0 0V -2V
0 100 200 300 400 500 600 700 800
VCEV, COLLECTOR-EMITTER CLAMP VOLTAGE (VOLTS)
Figure 7. Maximum Reverse Bias Switching
Safe Operating Area
1
SECOND BREAKDOWN
0.8 DERATING
0.6
THERMAL
0.4 DERATING
0.2
0
20 40 60 80 100 120 140 160
TC, CASE TEMPERATURE (°C)
Figure 8. Forward Bias Power Derating
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 6 is based on TC = 25°C; TJ(pk) is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC 25°C. Second breakdown limitations do not
derate the same as thermal limitations. Allowable current at
the voltages shown on Figure 6 may be found at any case
temperature by using the appropriate curve on Figure 8.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by second breakdown.
Use of reverse biased safe operating area data (Figure 7)
is discussed in the applications information section.
1
0.7 D = 0.5
0.5
D = 0.2
0.2
D = 0.1
0.1
0.07 D = 0.05
0.05
D = 0.02
0.02
D = 0.01
SINGLE PULSE
0.01
0.01 0.02
0.05 0.1
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
RqJC(t) = r(t) RqJC
RqJC = 1.56°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) RqJC(t)
0.2
0.5 1
2
5 10 20
50
t, TIME (msec)
Figure 9. Typical Thermal Response for MJE13007
100 200
500 10 k
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MJE13007G 전자부품, 판매, 대치품
MJE13007G
VOLTAGE REQUIREMENTS (continued)
In the four application examples (Table 2) load lines are
shown in relation to the pulsed forward and reverse biased
SOA curves.
In circuits A and D, inductive reactance is clamped by the
diodes shown. In circuits B and C the voltage is clamped by
the output rectifiers, however, the voltage induced in the
primary leakage inductance is not clamped by these diodes
and could be large enough to destroy the device. A snubber
network or an additional clamp may be required to keep the
turnoff load line within the Reverse Bias SOA curve.
Load lines that fall within the pulsed forward biased SOA
curve during turnon and within the reverse bias SOA curve
during turnoff are considered safe, with the following
assumptions:
1. The device thermal limitations are not exceeded.
2. The turnon time does not exceed 10 ms
(see standard pulsed forward SOA curves in Figure 6).
3. The base drive conditions are within the specified
limits shown on the Reverse Bias SOA curve (Figure 7).
CURRENT REQUIREMENTS
An efficient switching transistor must operate at the
required current level with good fall time, high energy
handling capability and low saturation voltage. On this data
sheet, these parameters have been specified at 5.0 amperes
which represents typical design conditions for these devices.
The current drive requirements are usually dictated by the
VCE(sat) specification because the maximum saturation
voltage is specified at a forced gain condition which must be
duplicated or exceeded in the application to control the
saturation voltage.
SWITCHING REQUIREMENTS
In many switching applications, a major portion of the
transistor power dissipation occurs during the fall time (tfi).
For this reason considerable effort is usually devoted to
reducing the fall time. The recommended way to accomplish
this is to reverse bias the baseemitter junction during
turnoff. The reverse biased switching characteristics for
inductive loads are shown in Figures 12 and 13 and resistive
loads in Figures 10 and 11. Usually the inductive load
components will be the dominant factor in SWITCHMODE
applications and the inductive switching data will more
closely represent the device performance in actual
application. The inductive switching characteristics are
derived from the same circuit used to specify the reverse
biased SOA curves, (see Table 1) providing correlation
between test procedures and actual use conditions.
SWITCHING TIME NOTES
In resistive switching circuits, rise, fall, and storage times
have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive
loads which are common to SWITCHMODE power
supplies and any coil driver, current and voltage waveforms
are not in phase. Therefore, separate measurements must be
made on each waveform to determine the total switching
time. For this reason, the following new terms have been
defined.
tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp
trv = Voltage Rise Time, 1090% Vclamp
tfi = Current Fall Time, 9010% IC
tti = Current Tail, 102% IC
tc = Crossover Time, 10% Vclamp to 10% IC
An enlarged portion of the turnoff waveforms is shown
in Figure 12 to aid in the visual identity of these terms. For
the designer, there is minimal switching loss during storage
time and the predominant switching power losses occur
during the crossover interval and can be obtained using the
standard equation from AN222A:
PSWT = 1/2 VCCIC(tc) f
Typical inductive switching times are shown in Figure 13.
In general, trv + tfi tc. However, at lower test currents this
relationship may not be valid.
As is common with most switching transistors, resistive
switching is specified at 25°C and has become a benchmark
for designers. However, for designers of high frequency
converter circuits, the user oriented specifications which
make this a “SWITCHMODE” transistor are the inductive
switching speeds (tc and tsv) which are guaranteed at 100°C.
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