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HCF40192B 데이터시트 PDF




STMicroelectronics에서 제조한 전자 부품 HCF40192B은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 HCF40192B 기능
기능 PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B BCD TYPE 40193B BINARY TYPE
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HCF40192B 데이터시트, 핀배열, 회로
HCC/HCF40192B
HCC/HCF40193B
PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK
WITH RESET) 40192B – BCD TYPE 40193B – BINARY TYPE
. INDIVIDUAL CLOCK LINES FOR COUNTING
UP OR COUNTING DOWN
. SYNCHRONOUS HIGH-SPEED CARRY AND
BORROW PROPAGATION DELAYS FOR CAS-
CADING
. ASYNCHRONOUS RESET AND PRESET CA-
PABILITY
. MEDIUM-SPEED OPERATION - fCL = 8MHz
(typ.) @ 10V
. STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
. 5V, 10V, AND 15V PARAMETRIC RATINGS
. INPUT CURRENT OF 100nA AT 18V AND 25°C
FOR HCC DEVICE
. 100% TESTED FOR QUIESCENT CURRENT
. MEETS ALL REQUIREMENTS OF JEDECTEN-
TATIVE STANDARD N° 13A, ”STANDARD SPE-
CIFICATIONS FOR DESCRIPTION OF ”B”
SERIES CMOS DEVICES”
EY F
(Plastic Package) (Ceramic Frit Seal Package)
M1
(Chip Carrier)
C1
(Plastic Chip Carrier)
ORDER CODES :
HCC401XXBF
HCF401XXBM1
HCF401XXBEY HCF401XXBC1
DESCRIPTION
The HCC40192B, HCC40193B, (extended tem-
perature range) and the HCF40192B, HCF40193B
(intermediate temperature range) are monolithic in-
tegrated circuits, available in 16-lead dual in-line
plastic or ceramic package and platic micro pack-
age. The HCC/HCF40192B Presettable BCD
Up/Down Counter and the HCC/HCF40193B Pres-
ettable Binary Up/Down Counter each consist of 4
synchronously clocked, gated ”D” type flip-flops
connected as a counter. The inputs consist of 4 in-
dividual jam lines, a PRESET ENABLE control, in-
dividual CLOCK UP and CLOCK DOWN signals
and a master RESET. Four buffered Q signal out-
puts as well as CARRY and BORROW outputs for
multiple-stage counting schemes are provided. The
counter is cleared so that all outputs are in a low
state by a high on the RESET line. A RESET is ac-
complished asynchronously with the clock. Each
output is individually programmable asynchron-
ously with the clock to the level on the corresponding
jam input when thePRESET ENABLE control is low.
The counter counts up one count on the positive
clock edge of the CLOCK UP signal provided the
CLOCK DOWN line is high. The counter counts
down one count on the positive clock edge of the
CLOCK DOWN signal provided the CLOCK UP line
June 1989
PIN CONNECTIONS
1/15




HCF40192B pdf, 반도체, 판매, 대치품
HCC/HCF40192B/193B
TIMING DIAGRAMS
40192B (BCD).
40193B (Binary).
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HCF40192B 전자부품, 판매, 대치품
HCC/HCF40192B/193B
DYNAMIC ELECTRICAL CHARACTERISTICS (T amb = 25°C, CL = 50pF, RL = 200k,
typical temperature coefficient for all VDD values is 0.3%/°C, all input rise and fall time = 20ns)
Symbol
Parameter
t PHL,
tPLH
Propagation Delay Time
Clock Up or Clock Down to Q
Reset to Q
PE to Q
Test Conditions
V al ue
V D D (V) Min. Typ. Max.
5 250 500
10 120 240
15 90 180
5 200 400
10 100 200
Clock Up to Carry
Clock Down to Borrow
Reset or PR to Borrow or Carry
15 70 140
5 160 320
10 80 160
15 60 120
5 300 600
t T HL,
tTLH
Transition Time
10 150 300
15 110 220
5 100 200
10 50 100
15 40 80
t re m*
Removal Time
Reset or PE
tW Clock Input Pulse Width
Reset
PE
5 80 40
10 40 20
15 30 15
5 480 240
10 300 150
15 260 130
5 120 240
10 85 170
15 70 140
Clock
5 90 180
10 45 90
15 30 60
tr, tf Clock Input Rise or Fall Time
5 15
10 15
fCL Maximum Clock Input Frequency
15 5
5 24
10 5 8
15 5.5 11
* The time required for Reset or Preset Enable control to be removed before clocking (see timing diagram).
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
MHz
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관련 데이터시트

부품번호상세설명 및 기능제조사
HCF40192B

PRESETTABLE UP/DOWN COUNTERS (DUAL CLOCK WITH RESET) 40192B BCD TYPE 40193B BINARY TYPE

STMicroelectronics
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