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PDF VT8235M Data sheet ( Hoja de datos )
| Número de pieza | VT8235M | |
| Descripción | Version CD South Bridge | |
| Fabricantes | VIA | |
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Hay una vista previa y un enlace de descarga de VT8235M (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Data Sheet
VT8235M
Version CD
South Bridge
Revision 2.03
March 16, 2005
VIA TECHNOLOGIES, INC.
1 page  
VT8235M Version CD V-Link South Bridge
USB I/O Registers ................................................................................................................................................................................. 54
Device 16 Function 2 Registers - USB 1.1 UHCI Ports 4-5 ............................................................................................... 55
PCI Configuration Space Header........................................................................................................................................................... 55
USB-Specific Configuration Registers.................................................................................................................................................. 56
USB I/O Registers ................................................................................................................................................................................. 58
Device 16 Function 3 Registers - USB 2.0 EHCI................................................................................................................ 59
PCI Configuration Space Header........................................................................................................................................................... 59
USB-Specific Configuration Registers.................................................................................................................................................. 60
EHCI USB 2.0 I/O Registers................................................................................................................................................................. 61
Device 17 Function 0 Registers – Bus Control and Power Management......................................................................... 62
PCI Configuration Space Header........................................................................................................................................................... 62
ISA Bus Control .................................................................................................................................................................................... 63
Miscellaneous Control........................................................................................................................................................................... 65
Function Control.................................................................................................................................................................................... 66
Serial IRQ, LPC, and PC/PCI DMA Control ........................................................................................................................................ 67
Plug and Play Control - PCI .................................................................................................................................................................. 67
GPIO and Miscellaneous Control.......................................................................................................................................................... 68
Programmable Chip Select Control ....................................................................................................................................................... 70
ISA Decoding Control........................................................................................................................................................................... 71
Power Management-Specific Configuration Registers.......................................................................................................................... 73
System Management Bus-Specific Configuration Registers ................................................................................................................. 80
SMB GPIO Slave Command Codes ...................................................................................................................................................... 80
General Purpose I/O Control Registers ................................................................................................................................................. 81
Watchdog Timer Registers .................................................................................................................................................................... 82
Power Management I/O-Space Registers .............................................................................................................................................. 83
System Management Bus I/O-Space Registers...................................................................................................................................... 92
Device 17 Function 1 Registers - Enhanced IDE Controller............................................................................................. 95
PCI Configuration Space Header........................................................................................................................................................... 95
IDE-Controller-Specific Configuration Registers ................................................................................................................................. 97
IDE Power Management Registers...................................................................................................................................................... 101
IDE Back Door Registers .................................................................................................................................................................... 101
IDE I/O Registers ................................................................................................................................................................................ 101
Device 17 Function 5 Registers - AC97 Audio Controller............................................................................................... 102
PCI Configuration Space Header......................................................................................................................................................... 102
Audio-Specific PCI Configuration Registers....................................................................................................................................... 103
I/O Base 0 Regs – Audio Scatter / Gather DMA ................................................................................................................................. 105
Device 17 Function 6 Registers - AC97 Modem Controller ............................................................................................ 114
PCI Configuration Space Header......................................................................................................................................................... 114
Modem-Specific PCI Configuration Registers .................................................................................................................................... 115
I/O Base 0 Regs – Modem Scatter / Gather DMA............................................................................................................................... 117
Device 18 Function 0 Registers - LAN .............................................................................................................................. 120
PCI Configuration Space Header......................................................................................................................................................... 120
LAN-Specific PCI Configuration Registers ........................................................................................................................................ 120
LAN I/O Registers............................................................................................................................................................................... 122
FUNCTIONAL DESCRIPTIONS ................................................................................................................................................ 133
POWER MANAGEMENT.............................................................................................................................................................. 133
Power Management Subsystem Overview .......................................................................................................................................... 133
Processor Bus States............................................................................................................................................................................ 133
System Suspend States and Power Plane Control................................................................................................................................ 134
General Purpose I/O Ports ................................................................................................................................................................... 134
Power Management Events ................................................................................................................................................................. 135
System and Processor Resume Events................................................................................................................................................. 135
Legacy Power Management Timers .................................................................................................................................................... 136
System Primary and Secondary Events ............................................................................................................................................... 136
Peripheral Events................................................................................................................................................................................. 136
ELECTRICAL SPECIFICATIONS ............................................................................................................................................ 137
ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................... 137
DC CHARACTERISTICS.............................................................................................................................................................. 137
REGISTER BITS POWERED BY VBAT ....................................................................................................................................... 138
Revision 2.03, March 16, 2005
-v-
Table of Content
5 Page 
VT8235M Version CD V-Link South Bridge
OVERVIEW
The VT8235M Version CD South Bridge is a high integration, high performance, power-efficient, and high compatibility device
that supports Intel and non-Intel based processor to V-Link bus bridge functionality to make a complete Microsoft PC2001-
compliant PCI/LPC system. The VT8235M Version CD includes standard intelligent peripheral controllers:
a) IEEE 802.3 compliant 10 / 100 Mbps PCI bus master Ethernet MAC with standard MII interface to external PHYceiver.
b) Master mode enhanced IDE controller with dual channel DMA engine and interlaced dual channel commands. Dedicated
FIFO coupled with scatter and gather master mode operation allows high performance transfers between PCI and IDE
devices. In addition to standard PIO and DMA mode operation, the VT8235M Version CD also supports the UltraDMA-
133, 100, 66, and 33 standards to allow reliable data transfer at rates up to 133 MB/sec. The IDE controller is SFF-8038i
v1.0 and Microsoft Windows-family compliant.
c) Universal Serial Bus controller that is USB v2.0 / 1.1 and Universal HCI v2.0 / 1.1 compliant. The VT8235M Version CD
includes three root hubs with six function ports with integrated physical layer transceivers. The USB controller allows hot
plug and play and isochronous peripherals to be inserted into the system with universal driver support. The controller also
implements legacy keyboard and mouse support so that legacy software can run transparently in a non-USB-aware operating
system environment.
d) Keyboard controller with PS2 mouse support.
e) Real Time Clock with 256 byte extended CMOS. In addition to the standard ISA RTC functionality, the integrated RTC also
includes the date alarm, century field, and other enhancements for compatibility with the ACPI standard.
f) Notebook-class power management functionality compliant with ACPI and legacy APM requirements. Multiple sleep states
(power-on suspend, suspend-to-DRAM, and suspend-to-Disk) are supported with hardware automatic wake-up. Additional
functionality includes event monitoring, CPU clock throttling and stop (Intel processor protocol), PCI bus clock stop control,
modular power, clock and leakage control, hardware-based and software-based event handling, general purpose I/O, chip
select and external SMI.
g) Full System Management Bus (SMBus) interface.
h) Integrated bus-mastering dual full-duplex direct-sound AC97-link-compatible sound system.
i) Plug and Play controller that allows complete steerability of all PCI interrupts and internal interrupts / DMA channels to any
interrupt channel. One additional steerable interrupt channel is provided to allow plug and play and reconfigurability of on-
board peripherals for Windows family compliance.
The VT8235M Version CD also enhances the functionality of the standard ISA peripherals. The integrated interrupt controller
supports both edge and level triggered interrupts channel by channel. The integrated DMA controller supports type F DMA in
addition to standard ISA DMA modes. Compliant with the PCI-2.2 specification, the VT8235M Version CD supports delayed
transactions and remote power management so that slower ISA peripherals do not block the traffic of the PCI bus. Special
circuitry is built in to allow concurrent operation without causing dead lock even in a PCI-to-PCI bridge environment. The chip
also includes eight levels (doublewords) of line buffers from the PCI bus to the ISA bus to further enhance overall system
performance.
Revision 2.03, March 16, 2005
-4-
Overview
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet VT8235M.PDF ] | |
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