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JN5142-J01 데이터시트 PDF




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기능 JenNet-IP Wireless Microcontroller
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JN5142-J01 데이터시트, 핀배열, 회로
Data Sheet: JN5142-J01
JenNet-IP Wireless Microcontroller
Overview
The JN5142-J01 is an ultra low power, high performance wireless
microcontroller suitable for use in JenNet-IP Smart Devices. The JN5142
features an enhanced 32-bit RISC processor offering high coding efficiency
through variable width instructions, a multi-stage instruction pipeline and low
power operation with programmable clock speeds. It also includes a 2.4GHz
IEEE802.15.4 compliant transceiver, 128KB of ROM, 32KB of RAM, and a
comprehensive mix of analogue and digital peripherals. The JenNet-IP
network stack is embedded in the device ROM. The operating current is
below 18mA, allowing operation direct from a coin cell.
The peripherals support a wide range of applications. They include a 2-wire
serial interface, which operates as either master or slave, a two channel
ADC with battery and temperature sensors. A large switch matrix of up to 81
elements can be supported for remote control applications. The best in
class radio current and a 0.6µA sleep timer give excellent battery life.
Block Diagram
XTAL
22R..4a4zGdGiHHoz
Power
Management
Watchdog
Timer
Voltage Supply
Monitor
O-QPSK
Modem
IEEE802.15.4
MAC
Accelerator
RAM ROM
32KB 128KB
32-bit
RISC CPU
29-byte
OTP eFuse
128-bit AES
Encryption
Accelerator
SPI
2-Wire Serial
(Master)
Timer
UART
2-Wire Serial
(Slave)
Sleep Counter
4-Chan 8-bit
ADC
Battery and,
Temp Sensors
Benefits
Single chip optimized for
simple applications
Very low current solution for
long battery life – over 10 yrs
JenNet-IP Smart Devices
Highly featured 32-bit RISC
CPU for high performance
and low power
System BOM is low in
component count and cost
Flexible sensor interfacing
options
Applications
Robust and secure low power
wireless applications using
JenNet-IP
Smart devices, for example
Thermostats, Motion sensors
etc
Lighting Control
Lamps
Wall switches
Active RFID tags
Energy harvesting, for example
self powered light switch
Features: Transceiver
2.4GHz IEEE802.15.4 compliant
128-bit AES security processor
MAC accelerator with packet
formatting, CRCs, address check,
auto-acks, timers
Integrated ultra low power sleep
oscillator – 0.6µA
2.0V to 3.6V battery operation
Deep sleep current 0.12µA
(Wake-up from IO)
0.7µA sleep with timer (1.4uA with
RAM held)
<$0.50 external component cost
Rx current 16.5mA
Tx current 14.8mA
Receiver sensitivity -95dBm
Transmit power 2.5dBm
Features: Microcontroller
32-bit RISC CPU, 1 to 32MHz
clock speed
Low power operation
Variable instruction width for high
coding efficiency
Multi-stage instruction pipeline
128KB ROM and 32KB RAM for
bootloaded program codeJenNet-
IP stack in ROM
Master/Slave I2C 2-wire interface
3xPWM and Application
timer/counter
2 low power pulse counters
UART
SPI port with 3 selects
Supply Voltage Monitor with 8
programmable thresholds
2- to 4-input 8-bit ADC,
comparator
Battery and temperature sensors
Watchdog timer and Power-on-
Reset (with brown-out) circuit
Up to 18 DIO
Industrial temp -40°C to +125°C
6x6mm 40-lead Punched QFN
Lead-free and RoHS compliant
© NXP Laboratories UK 2012
JN-DS-JN5142-J01-J01 1v1
1




JN5142-J01 pdf, 반도체, 판매, 대치품
18 Power Management and Sleep Modes
18.1 Operating Modes
18.1.1 Power Domains
18.2 Active Processing Mode
18.2.1 CPU Doze
18.3 Sleep Mode
18.3.1 Wakeup Timer Event
18.3.2 DIO Event
18.3.3 Comparator Event
18.3.4 Pulse Counter
18.4 Deep Sleep Mode
19 Electrical Characteristics
19.1 Maximum Ratings
19.2 DC Electrical Characteristics
19.2.1 Operating Conditions
19.2.2 DC Current Consumption
19.2.3 I/O Characteristics
19.3 AC Characteristics
19.3.1 Reset and Supply Voltage Monitor
19.3.2 SPI Master Timing
19.3.3 Two-wire Serial Interface
19.3.4 Wakeup and Boot Load Timings
19.3.5 Bandgap Reference
19.3.6 Analogue to Digital Converters
19.3.7 Comparator
19.3.8 32kHz RC Oscillator
19.3.9 32kHz Crystal Oscillator
19.3.10 32MHz Crystal Oscillator
19.3.11 High-Speed RC Oscillator
19.3.12 Temperature Sensor
19.3.13 Radio Transceiver
Appendix A Mechanical and Ordering Information
A.1 SOT618-1 HVQFN40 40-pin QFN Package Drawing
A.2 Footprint information
A.3 Ordering Information
A.4 Device Package Marking
A.5 Tape and Reel Information
A.5.1 Tape Orientation and Dimensions
A.5.2 Reel Information: 180mm Reel
A.5.3 Reel Information: 330mm Reel
A.5.4 Dry Pack Requirement for Moisture Sensitive Material
Appendix B Development Support
B.1 Crystal Oscillators
B.1.1 Crystal Equivalent Circuit
B.1.2 Crystal Load Capacitance
B.1.3 Crystal ESR and Required Transconductance
B.2 32MHz Oscillator
B.3 32kHz Oscillator
B.4 JN5142 Module Reference Designs
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© NXP Laboratories UK 2012

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JN5142-J01 전자부품, 판매, 대치품
1.4 Peripherals
The following peripherals are available on chip:
Master SPI port with three select outputs
UART with support for hardware or software flow control
One programmable Timer/Counter which supports Pulse Width Modulation (PWM) and capture/compare, plus
three PWM timers which support PWM and Timer modes only.
Two programmable Sleep Timers and a Tick Timer
Two-wire serial interface (compatible with SMbus and I2C) supporting master and slave operation
Eighteen digital I/O lines (multiplexed with peripherals such as timers and UARTs)
8-bit, Analogue to Digital converter with up to four input channels
Programmable analogue comparator
Internal temperature sensor and battery monitor
Two low power pulse counters
Random number generator
Watchdog Timer and Supply Voltage Monitor
User applications access the peripherals using the Integrated Peripherals API. This allows applications to use a
tested and easily understood view of the peripherals allowing rapid system development.
© NXP Laboratories UK 2012
JN-DS-JN5142-J01-J01 1v1
7

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JN5142-J01

JenNet-IP Wireless Microcontroller

NXP Semiconductors
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