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PDF MGA-65606 Data sheet ( Hoja de datos )
| Número de pieza | MGA-65606 | |
| Descripción | Low Noise Amplifier | |
| Fabricantes | AVAGO | |
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MGA-65606
Low Noise Amplifier with switchable Bypass/Shutdown Mode
in Low Profile Package
Data Sheet
Description
Avago Technologies’ MGA-65606 is an economical, easy-
to-use GaAs MMIC Low Noise Amplifier (LNA) with Bypass/
Shutdown mode. The LNA has low noise and high linearity
achieved through the use of Avago Technologies’ propri-
etary 0.25 m GaAs Enhancement-mode pHEMT process.
The Bypass/Shutdown mode enables the LNA to be
bypassed during high input signal power and reduce
current consumption. It is housed in a low profile 2.0 x 1.3
x 0.5 mm3 6-pin Ultra Thin Package. The compact footprint
and low profile coupled with low noise, high linearity make
the MGA-65606 an ideal choice as a low noise amplifier for
mobile and CPE receivers in the WiMAX and WLL (2.5 – 4)
GHz band.
Component Image
2.0 x 1.3 x 0.5 mm3 6-lead Ultra Thin Package
Note:
Package marking provides
65X
orientation and identification
“65” = Product Code
“X” = Month Code
Pin Configuration
Features
Low current consumption
Adjustable bias current
Simple matching network
Broadband operation (2.5 – 4) GHz
Low Noise Figure
Low current consumption in Bypass Mode, <100 A
Fully matched to 50 ohm in Bypass Mode
High Linearity (LNA and Bypass Mode)
Low profile package
Typical Performance
3.5 GHz; 3V, 10mA (Typ):
15.3 dB Gain
1.05 dB Noise Figure
+5.7 dBm Input IP3
-2.4 dBm Input Power at 1 dB gain compression
4.2 dB Insertion Loss in Bypass Mode
17 dBm IIP3 in Bypass Mode (Pin = -20 dBm)
<100 A current consumption in Bypass mode
Pin 1 (Vbias)
Pin 6 (Vsd)
Pin 2 (RFin) GND Pin 5 (RFOut)
Pin 3 (Gnd)
Pin 4 (Vdd)
Applications
Low noise amplifier for WiMAX, Wireless Local Loop.
Other ultra low noise applications in the 2.5 – 4 GHz
band.
TOP VIEW
Simplified Schematic
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 50 V
ESD Human Body Model = 300 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
VBias
RF IN
R
1
2
L
3
Bias /
Control
LNA
6 VSD
L
5
RF OUT
LR
4 Vdd
CC
1 page  
Demo Board Schematic for 3.5 GHz application
V Bias R2 1
(Pin 1)
RF IN
(Pin 2)
50-Ohms TL
2
L1
3
Bias /
Control
LNA
Gnd
(Pin 3)
Figure 6. Demo Board Schematic Diagram
6 VSD
(Pin 6)
L2
5
50-Ohms TL
RF OUT
(Pin 5)
L3
4
C1
R1
Vdd
(Pin 4)
C2
Table 2 Typical Components Used For Demo Board In Fig 4
And Schematic Shown In Fig 6. R2 is adjusted for desired
current.
Component
L1
L2
L3
C1
C2
R1
R2
Vendor
Taiyo Yuden
Taiyo Yuden
Taiyo Yuden
Taiyo Yuden
Murata
ROHM
ROHM
Size
0402
0402
0402
0402
0402
0402
0402
Value
2.2 nH
2.4 nH
1.0 nH
8 pF
0.1 F
10 ohm
1.8 Kohm
MGA-65606 Typical Performance (3.5 GHz match)
TA = +25° C, Vdd = 3 V, Ids = 10 mA (Vbias = 2.7 V), RF mea-
surement at 3.5 GHz, Input Signal = CW unless stated
otherwise.
20
10
0
-10
-20
-30
-40
Input Return Loss
Output Return Loss
-50
Gain
Isolation
-60
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Frequency (GHz)
Figure 7. LNA Mode Gain, Input Return Loss, Output Return Loss, Isolation vs
Frequency
5
5 Page 
MGA-65606 LNA Mode typical noise parameters at 25° C, Vdd = 3 V; Vbias = 2.7 V; Vsd = 0 V
Freq. (GHz)
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4.0
4.2
4.4
4.6
4.8
5.0
5.2
5.4
5.6
5.8
6.0
Fmin (dB)
0.79
0.76
0.73
0.71
0.70
0.70
0.71
0.73
0.75
0.78
0.81
0.85
0.89
0.94
0.99
1.05
1.08
1.13
1.18
1.23
1.28
1.36
1.43
1.47
1.49
1.48
1.42
1.33
1.18
0.97
0.71
opt Mag
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.36
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
0.35
opt Ang
41.93
44.59
47.26
49.93
52.59
55.26
57.93
60.60
63.26
65.93
68.60
71.27
73.93
76.60
79.27
81.94
84.60
87.27
89.94
92.60
95.27
100.60
105.90
111.30
116.60
121.90
127.30
132.60
137.90
143.30
148.60
Rn/50
0.09
0.11
0.13
0.15
0.16
0.18
0.19
0.20
0.21
0.22
0.22
0.22
0.23
0.22
0.22
0.22
0.21
0.21
0.20
0.19
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.05
0.04
0.03
0.03
11
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