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P650HVN02.4 데이터시트 PDF




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부품번호 P650HVN02.4 기능
기능 Color TFT-LCD
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P650HVN02.4 데이터시트, 핀배열, 회로
P645HVN02.4 Product Specification
Rev. 0.1
Model Name: P650HVN02.4
Issue Date : 2012/10/18
()Preliminary Specifications
( )Final Specifications
Customer Signature
Date AUO
Date
Approved By
Approval By PM Director
Paley Fang
_________________________________ ____________________________________
Note
Reviewed By RD Director
Eugene Chen
____________________________________
Reviewed By Project Leader
Alex HM Chen
____________________________________
Prepared By PM
Antonio Kuo
__________________________________
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
Page 1 / 31




P650HVN02.4 pdf, 반도체, 판매, 대치품
P645HVN02.4 Product Specification
Rev. 0.1
1. General Description
This specification applies to the 64.5 inch Color TFT-LCD Module P650HVN02.4. This LCD module has a TFT
active matrix type liquid crystal panel 1920 x 1080 pixels, and diagonal size of 64.5 inch. This module supports
1920 x 1080 mode. Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical
stripes. Gray scale or the brightness of the sub-pixel color is determined with a 10-bit gray scale signal for each
dot.
The P650HVN02.4 has been designed to apply the 10-bit 2 channel LVDS interface method. It is intended to
support displays where high brightness, wide viewing angle, high color saturation, and high color depth are very
important.
* General Information
Items
Specification
Active Screen Size
64.53
Display Area
1428.48 (H) x 803.52 (V)
Outline Dimension
1508.0(H) x 878.0(V) x 12.8(D)
Driver Element
a-Si TFT active matrix
Display Colors
10 bit, 1.07B
Number of Pixels
1920 x 1080
Pixel Pitch
0.744
Pixel Arrangement
RGB vertical stripe
Display Operation Mode
Normally Black
Surface Treatment
Anti-Glare, 3H
Display Orientation
Portrait/Landscape Enable
[1] Please refer to 5.1 Placement Suggestions.
Unit
inch
mm
mm
Colors
Pixel
mm
Note
Haze 2%
[1]
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
Page 4 / 31

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P650HVN02.4 전자부품, 판매, 대치품
P645HVN02.2 Product Specification
Rev. 1.0
3. Test Condition:
(1) The measure point of VRP is in LCM side after connecting the System Board and LCM.
(2) Under Max. Input current spec. condition.
4. VICM = 1.25V
LVDS -
V IC M
LVDS +
V TH
V TL
|V ID|
GND
|V ID|
0V
|V ID|
5. The measure points of VIH and VIL are in LCM side after connecting the System Board and LCM
3.1.2: AC Electrical Characteristics
Parameter
Input Channel Pair Skew Margin
LVDS
Interface
Receiver Clock : Spread Spectrum
Modulation range
Receiver Clock : Spread Spectrum
Modulation frequency
Receiver Data Input Margin
Fclk = 85 MHz
Fclk = 65 MHz
1. Input Channel Pair Skew Margin
Symbol
Min.
tSKEW (CP)
Fclk_ss
Fss
-500
Fclk
-3%
30
Value
Typ.
Max
-- +500
Fclk
--
+3%
-- 200
Unit Note
ps
MHz
KHz
1
2
2
tRMG
-0.4
--
0.4
ns 3
-0.5 --
0.5
Note: x = 0, 1, 2, 3, 4
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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