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부품번호 | P420HW03-V0 기능 |
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기능 | TFT LCD Module | ||
제조업체 | AUO | ||
로고 | |||
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P420HW03 V0 Product Specification
Rev.0 5
Model Name: P420HW03 V0
Issue Date : 2011/07/21
( )Preliminary Specifications
(Ϡ)Final Specifications
Customer Signature
Date AUO
Date
Approved By
_________________________________
Approval By PM Director
Michael Goan
____________________________________
Note
Reviewed By RD Director
Eugene CC Chen
____________________________________
Reviewed By Project Leader
Ming Yu Wu
____________________________________
Prepared By PM
Antonio Kuo
____________________________________
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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P420HW03 V0 Product Specification
Rev.0 5
1. General Description
This specification applies to the 42.0 inch Color TFT-LCD PID Module P420HW03 V0. This LCD module has a
TFT active matrix type liquid crystal panel 1,920x1,080 pixels, and diagonal size of 42.0 inch. This module supports
1,920x1,080 mode. Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical
stripes. Gray scale or the brightness of the sub-pixel color is determined with a 10-bit gray scale signal for each
dot.
The P420HW03 V0 is designed to apply the 10-bit 4 channel LVDS interface method. The main features of
P420HW03 V0 are long life time, 500nits brightness, wide view angel and 10-bit color displays.
* General Information
Items
Active Screen Size
Display Area
Outline Dimension
Driver Element
Bezel Opening
Display Colors
Number of Pixels
Pixel Pitch
Pixel Arrangement
Display Operation Mode
Surface Treatment
Specification
42.00
930.24(H) x 523.26(V)
968.4(H) x 564.0 (V) x 10.8 (D)
a-Si TFT active matrix
938.4 (H) x 531 (V)
10bit(8 bit + FRC),1073.7M
1,920x1,080
0.4845
RGB vertical stripe
Normally Black
Anti-Glare, 3H
Unit
inch
mm
mm
mm
Colors
Pixel
mm
Note:
1.1 Dmin: 10.8mm
1.2 Dmax: 26.7mm (front bezel to boss top)
Note
1
Haze=11%
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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3.1.2: AC Characteristics
P420HW03 V0 Product Specification
Rev.0 5
Parameter
Input Channel Pair Skew Margin
LVDS
Interface
Receiver Clock : Spread Spectrum
Modulation range ʳ
Receiver Clock : Spread Spectrum
Modulation frequencyʳ
Receiver Data Input Margin
Fclk = 85 MHz
Fclk = 65 MHzʳ
Symbol
Min.
tSKEW (CP)
Fclk_ssʳ
Fssʳ
-500
Fclk
-3%ʳ
30ʳ
Value
Typ.
Max
-- +500
Fclk
--ʳ
+3%ʳ
--ʳ 200ʳ
Unit Note
ps 6
MHzʳ
7
KHzʳ
7
tRMGʳ -0.4
--ʳ
0.4
nsʳ 8
-0.5ʳ
--ʳ
0.5ʳ
Note :
к1. VDD = 12.0V, Fv = 120Hz, Fclk= 77.29MHz , 25 , Test Pattern : White Pattern
2. Measurement condition : Rising time = 400us
9''
*1'
3. VICM = 1.25V
LVDS -
V ICM
LVDS +
GND
0V
μs
|V ID|
|V ID|
V TH
V TL
|V ID|
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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