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P650HVN02.0 데이터시트 PDF




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P650HVN02.0 데이터시트, 핀배열, 회로
Global LCD Panel Exchange Center
www.panelook.com
P645HVN02.0 Product Specification
Rev. 3.0
Model Name: P650HVN02.0
Issue Date : 2011/09/20
(Ϡ)Preliminary Specifications
( )Final Specifications
Customer Signature
Date AUO
Date
Approved By
Approval By PM Director
Michael Goan
_________________________________ ____________________________________
Note
Reviewed By RD Director
Eugene Chen
____________________________________
Reviewed By Project Leader
TaiYu Chen
____________________________________
Prepared By PM
Antonio Kuo
____________________________________
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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P650HVN02.0 pdf, 반도체, 판매, 대치품
Global LCD Panel Exchange Center
www.panelook.com
P645HVN02.0 Product Specification
Rev. 3.0
1. General Description
This specification applies to the 64.5 inch Color TFT-LCD Module P650HVN02.0. This LCD module has a TFT
active matrix type liquid crystal panel 1920 x 1080 pixels, and diagonal size of 64.5 inch. This module supports
1920 x 1080 mode. Each pixel is divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical
stripes. Gray scale or the brightness of the sub-pixel color is determined with a 10-bit gray scale signal for each
dot.
The P650HVN02.0 has been designed to apply the 10-bit 4 channel LVDS interface method. It is intended to
support displays where high brightness, wide viewing angle, high color saturation, and high color depth are very
important.
* General Information
Items
Active Screen Size
Display Area
Outline Dimension
Driver Element
Display Colors
Number of Pixels
Pixel Pitch
Pixel Arrangement
Display Operation Mode
Surface Treatment
Specification
64.53
1428.48 (H) x 803.52 (V)
1508.0(H) x 878.0(V) x 12.8(D)
a-Si TFT active matrix
10 bit, 1.07B
1920 x 1080
0.744
RGB vertical stripe
Normally Black
Anti-Glare, 3H
Unit
inch
mm
mm
Colors
Pixel
mm
Note
Haze 2%
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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P650HVN02.0 전자부품, 판매, 대치품
Global LCD Panel Exchange Center
www.panelook.com
4. VICM = 1.25V
LVDS -
V IC M
LVDS +
P645HVN02.0 Product Specification
Rev. 3.0
V TH
V TL
|V ID|
GND
|V ID|
0V
|V ID|
3.1.2: AC Electrical Characteristics
Parameter
Input Channel Pair Skew Margin
LVDS
Interface
Receiver Clock : Spread Spectrum
Modulation range ʳ
Receiver Clock : Spread Spectrum
Modulation frequencyʳ
Receiver Data Input Margin
Fclk = 85 MHz
Fclk = 65 MHzʳ
Symbol
Min.
tSKEW (CP)
Fclk_ssʳ
Fssʳ
-500
Fclk
-3%ʳ
30ʳ
tRMGʳ
-0.4
-0.5ʳ
Value
Typ.
Max
-- +500
Fclk
--ʳ +3%ʳ
--ʳ 200ʳ
ʳ
--ʳ 0.4
--ʳ 0.5ʳ
Unit Note
ps 1
MHzʳ
2
KHzʳ
2
nsʳ 3
1. Input Channel Pair Skew Margin
Note: x = 0, 1, 2, 3, 4
© Copyright AUO Optronics Corp. 2010 All Rights Reserved.
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