|
|
PDF GTLP6C817MTC Data sheet ( Hoja de datos )
| Número de pieza | GTLP6C817MTC | |
| Descripción | Low Drive GTLP-to-LVTTL 1:6 Clock Driver | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de GTLP6C817MTC (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
|
No Preview Available !
June 1999
Revised August 1999
GTLP6C817
Low Drive GTLP-to-LVTTL 1:6 Clock Driver
General Description
The GTLP6C817 is a low drive clock driver that provides
TTL to GTLP signal level translation (and vice versa). The
device provides a high speed interface between cards
operating at TTL logic levels and a backplane operating at
GTLP logic levels. High speed backplane operation is a
direct result of GTLP’s reduced output swing (<1V),
reduced input threshold levels and output edge rate con-
trol. The edge rate control minimizes bus settling time.
GTLP is a Fairchild Semiconductor derivative of the Gun-
ning Transceiver logic (GTL) JEDEC standard JESD8-3.
Fairchild’s GTLP has internal edge-rate control and is pro-
cess, voltage, and temperature (PVT) compensated. Its
function is similar to BTL and GTL but with different output
levels and receiver threshold. GTLP output LOW level is
typically less than 0.5V, the output level HIGH is 1.5V and
the receiver threshold is 1.0V.
Features
s Interface between TTL and GTLP logic levels
s Edge Rate Control to minimize noise on the GTLP port
s Power up/down high impedance for live insertion
s 1:6 fanout clock driver for LVTTL port
s 1:2 fanout clock driver for GTLP port
s LVTTL compatible driver and control inputs
s 5V over voltage tolerance on LVTTL ports
s Flow through pinout optimizes PCB layout
s Open drain on GTLP to support wired-or connection
s Recommended Operating Temperature −40°C to +85°C
Ordering Code:
Order Number Package Number Package Description
GTLP6C817MTC
MTC24
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Descriptions
Connection Diagram
Pin Names
Description
TTLIN, GTLPIN Clock Inputs (TTL and GTLP respectively)
OEB
Output Enable (Active LOW)
GTLP Port (TTL Levels)
OEA
Output Enable (Active LOW)
TTL Port (TTL Levels)
VCCT.GNDT
VCC
GNDG
LVTTL Output Supplies (3V)
Internal Circuitry VCC (5V)
OBn GTLP Output Grounds
VREF
OA0–OA5
Voltage Reference Input
TTL Buffered Clock Outputs
OB0–OB1
GTLP Buffered Clock Outputs
© 1999 Fairchild Semiconductor Corporation DS500246
www.fairchildsemi.com
1 page  
AC Electrical Characteristics
Over recommended range of supply voltage and operating free air temperature. VREF = 1.0V (unless otherwise noted).
CL = 30 pF for OBn-Port and CL = 50 pF for OAn-Port.
Symbol
From (Input)
To (Output)
Typ
Min Max
(Note 6)
tPLH
tPHL
TTLIN
OBn
2.3
1.5
4.7
4.6
tPLH
tPHL
tRISE
tFALL
tRISE
tFALL
OEB
OBn
Transition Time, OB Outputs (20% to 80%)
Transition Time, OB outputs (20% to 80%)
Transition Time, OA outputs (10% to 90%)
Transition Time, OA outputs (10% to 90%)
2.4 4.8
1.6 4.7
1.7
2.1
2.7
2.2
tPZH, tPZL
tPLZ, tPHZ
tPLH
tPHL
OEA
GTLPIN
OAn
OAn
2.4
2.0
3.1
2.8
6.5
6.5
6.6
6.0
Note 6: All typical values are at VCC = 5.0V and TA = 25°C.
Units
ns
ns
ns
ns
ns
ns
ns
ns
Extended Electrical Characteristics
Over recommended ranges of supply voltage and operating free-air temperature VREF = 1.0V (unless otherwise noted).
CL = 30 pF for B Port and CL = 50 pF for A Port.
Symbol
From
(Input)
To
(Output)
Typ
Min Max
(Note 7)
Unit
tOSLH
tOSHL
tPS
tPV(HL)
(Note 8)
(Note 8)
(Note 9)
(Note 10)
(Note 11)
A
A
A
A
B
B
B
B
.05 .4 ns
.05 .4
0.5 1.0 ns
.7 ns
tOSLH
tOSHL
tOST
tPS
tPV
(Note 8)
(Note 8)
(Note 8)
(Note 9)
(Note 10)
B
B
B
B
B
A
A
A
A
A
.12 .5
ns
.12 .5
.6 1.0 ns
0.5 1.0 ns
1.2 ns
Note 7: All typical values are at VCC = 5.0V and TA = 25°C.
Note 8: tOSHL/tOSLH and tOST - Output-to-Output skew is defined as the absolute value of the difference between the actual propagation delay for all outputs
within the same packaged device. The specifications are given for specific worst case VCC and temperature and apply to any outputs switching in the same
direction either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH) or in opposite directions both HL and LH (tOST). This parameter is guaranteed by design and
statistical process distribution. Actual skew values between the GTLP outputs could vary on the backplane due to the loading and impedance seen by the
device.
Note 9: tPS - Pin or Transition skew is defined as the difference between the LOW-to-HIGH transition and the HIGH-to-LOW transition on the same pin. The
parameter is measured across all the outputs of the same chip is specified for a specific worst case VCC and temperature. This parameter is guaranteed by
design and statistical process distribution. Actual skew values between the GTLP outputs could vary on the backplane due to the loading and impedance
seen by the device.
Note 10: tPV - Part-to-Part skew is defined as the absolute value of the difference between the actual propagation design for all outputs from device-to-
device. The parameter is specified for a specific worst case VCC and temperature. This parameter is guaranteed by design and statistical process distribu-
tion. Actual skew values between the GTLP output could vary on the backplane due to the loading and impedance seen by the device.
Note 11: Due to the open drain structure on GTLP outputs, tOST and tPV(LH) in the A-to-B direction are not specified. Skew on these paths is dependent on
the VTT and RT values in the actual application.
5 www.fairchildsemi.com
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet GTLP6C817MTC.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| GTLP6C817MTC | Low Drive GTLP-to-LVTTL 1:6 Clock Driver | Fairchild Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |