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부품번호 | T390HVN03.0 기능 |
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기능 | TFT LCD Module | ||
제조업체 | AUO | ||
로고 | |||
T390HVN03.0 SKD Product Specification
Rev.1.1
Model Name: T390HVN03.0
Issue Date : 2012/10/18
()Preliminary Specifications
(*)Final Specifications
(T39” FHD 60Hz Open cell)
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 1 / 28
1. General Description
T390HVN03.0 SKD Product Specification
Rev.1.1
This specification applies to the 38.5 inch Color TFT-LCD SKD model T390HVN03.0. This LCD Open Cell Unit
has a TFT active matrix type liquid crystal panel 1,920x1,080 pixels, and diagonal size of 38.5 inch. Each pixel is
divided into Red, Green and Blue sub-pixels or dots which are arranged in vertical stripes. Gray scale or the
brightness of the sub-pixel color is determined with a 8-bit gray scale signal for each dot.
The T390HVN03.0 has been designed to apply the 8-bit 2 channel LVDS interface method. It is intended to
support displays where high brightness, wide viewing angle, high color saturation, and high color depth are very
important.
General Information
Items
Specification
Unit
Active Screen Size
38.5 inch
Display Area
853.92 (H) x 480.33 (V)
mm
Outline Dimension
863.92 (H) x 492.83 (V) x 1.36 (D) mm
Driver Element
a-Si TFT active matrix
Display Colors
8 bit Colors
Number of Pixels
1,920x1,080
Pixel
Pixel Pitch
0.44475 (H) x 0.44475 (W)
mm
Pixel Arrangement
RGB vertical stripe
Display Operation Mode
Normally Black
Surface Treatment
Anti-Glare, 3H
Haze=2%
Rotate Function
Unachievable
Note 1
Display Orientation
Signal input with “ABC”
Note 2
Note 1: Rotate Function refers to LCD display could be able to rotate.
Note 2: LCD display as below illustrated when signal input with “ABC”.
Note
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 4 / 28
4페이지 T390HVN03.0 SKD Product Specification
Rev.1.1
(5) Typ. Input current : White Pattern
Max. Input current: Heavy loading pattern defined by AUO
>> refer to “Section:3.3 Signal Timing Specification, Typical timing”
2. Measurement condition : Rising time = 400us
90%
VDD
GND
10%
400µs
3. Test Condition:
(1) The measure point of VRP is in LCM side after connecting the System Board and LCM.
(2) Under Max. Input current spec. condition.
4. VICM = 1.25V
LVDS -
V IC M
LVDS +
V TH
V TL
|V ID|
GND
|V ID|
0V
|V ID|
5. The measure points of VIH and VIL are in LCM side after connecting the System Board and LCM.
6. LVDS Receiver Clock SSCG (Spread spectrum clock generator) is defined as below figures.
Fclk_ss(max)
1/FSS
Fclk
Fclk_ss(min)
© Copyright AU Optronics Corp. 2013 All Rights Reserved.
Page 7 / 28
7페이지 | |||
구 성 | 총 28 페이지수 | ||
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부품번호 | 상세설명 및 기능 | 제조사 |
T390HVN03.0 | TFT LCD Module | AUO |
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