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L6204 데이터시트 PDF




STMicroelectronics에서 제조한 전자 부품 L6204은 전자 산업 및 응용 분야에서
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부품번호 L6204 기능
기능 DMOS DUAL FULL BRIDGE DRIVER
제조업체 STMicroelectronics
로고 STMicroelectronics 로고


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L6204 데이터시트, 핀배열, 회로
L6204
DMOS DUAL FULL BRIDGE DRIVER
ADVANCE DATA
SUPPLY VOLTAGE UP TO 48V
RDS(ON) 1.2(25°C)
CROSS CONDUCTION PROTECTION
THERMAL SHUTDOWN
0.5A DC CURRENT
TTL/CMOS COMPATIBLE DRIVER
HIGH EFFICIENCY CHOPPING
MULTIPOWER BCD TECHNOLOGY
DESCRIPTION
The L6204 is a dual full bridge driver for motor
control applications realized in BCD technology
which combines isolated DMOS power transistors
with CMOS and Bipolar circuits on the same chip.
By using mixed technology it has been possible to
optimize the logic circuitry and the power stage to
achieve the best possible performance.
The logic inputs are TTL/CMOS compatible. Both
channels are controlled by a separate Enable.
Each bridge has a sense resistor to control the
currenrt level.
BLOCK DIAGRAM
Powerdip 16+2+2
SO 24+2+2
ORDERING NUMBERS:
L6204
L6204D
The L6204 is mounted in an 20-lead Powerdip
and SO 24+2+2 packages and the four center
pins are used to conduct heat to the PCB. At nor-
mal operating temperatures no external heatsink
is required.
March 1994
1/10
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.




L6204 pdf, 반도체, 판매, 대치품
L6204
CIRCUIT DESCRIPTION
L6204 is a dual full bridge IC designed to drive
DC motors, stepper motors and other inductive
loads. Each bridge has 4 power DMOS transistor
with RDSon = 1.2and the relative protection and
control circuitry. (see fig. 3)
The 4 half bridges can be controlled independently
by means of the 4 inputs IN!, IN2, IN3, IN4 and 2
enable inputs ENABLE1 and ENABLE2.
External connections are provided so that sensing
resistors can be added for constant current chop-
per applications.
LOGIC DRIVE (*)
INPUTS
IN1
IN3
EN1=EN2=H
L
L
H
H
EN1=EN2=L X
IN2 OUTPUT MOSFETS
IN4
L Sink 1, Sink 2
H Sink 1, Source 2
L Source 1, Sink 2
H Source 1, Source 2
X All transistor turned
OFF
L = Low H = High X = Don’t care
(*) True table for the two full bridges
CROSS CONDUCTION
Although the device guarantees the absence of
cross-conduction, the presence of the intrinsic di-
odes in the POWER DMOS structure causes the
generation of current spikes on the sensing termi-
nals. This is due to charge-discharge phenomena
in the capacitors C1 & C2 associated with the
drain source junctions (fig. 1). When the output
switches from high to low, a current spike is gen-
erated associated with the capacitor C1. On the
low-to-high transition a spike of the same polarity
is generated by C2, preceded by a spike of the
opposite polarity due to the charging of the input
capacity of the lower POWER DMOS transistor
(see fig. 2).
Figure 1: Intrinsic Structures in the POWER
MOS Transistors
Figure 2: Current Typical Spikes on the Sensing Pin
TRANSISTOR OPERATION
ON STATE
When one of the POWER DMOS transistors is ON
it can be considered as a resistor RDS(ON) = 1.2at
a junction temperature of 25°C.
In this condition the dissipated power is given by :
PON = RDS(ON) IDS2
The low RDS(ON) of the Multipower-BCD process
can provide high currents with low power dissipa-
tion.
OFF STATE
When one of the POWER DMOS transistor is
OFF the VDS voltage is equal to the supply volt-
age and only the leakage current IDSS flows. The
power dissipation during this period is given by :
POFF = VS IDSS
TRANSITIONS
Like all MOS power transistors the DMOS
POWER transistors have as intrinsic diode be-
tween their source and drain that can operate as
a fast freewheeling diode in switched mode appli-
cations. During recirculation with the ENABLE in-
put high, the voltage drop across the transistor is
RDS(ON) . ID and when the voltage reaches the di-
ode voltage it is clamped to its characteristic.
When the ENABLE input is low, the POWER
MOS is OFF and the diode carries all of the recir-
culation current. The power dissipated in the tran-
sitional times in the cycle depends upon the volt-
age and current waveforms in the application.
Ptrans. = IDS(t) VDS(t)
BOOTSTRAP CAPACITORS
To ensure the correct driving of high side drivers
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L6204 전자부품, 판매, 대치품
L6204
QUIESCENT ENERGY
The last contribution to the energy dissipation is
due to the quiescent supply current and is given
by :
EQUIESCENT = IQUIESCENT VS T
TOTAL ENERGY PER CYCLE
ETOT = (EOFF/ON + EON + ECOM + EON/OFF)bridge 1+
+(EOFF/ON + EON + ECOM + EON/OFF)bridge 2+
+ EQUIESCENT
The Total Power Dissipation PDIS is simply :
PDIS = ETOT/T
Tr = Rise time
TON = ON time
Tf = Fall Time
Td = Dead time
T = Period
T = Tr + TON + Tf + Td
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