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L6260 데이터시트 PDF




STMicroelectronics에서 제조한 전자 부품 L6260은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


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부품번호 L6260 기능
기능 4.5 - 5.5V DISK DRIVER SPINDLE & VCM/ POWER & CONTROL COMBOS
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L6260 데이터시트, 핀배열, 회로
L6260
4.5 – 5.5V DISK DRIVER SPINDLE & VCM,
POWER & CONTROL COMBO’S
GENERAL
5V OPERATION. *REGISTER BASED ARCHI-
TECTURE
MINIMUM EXTERNAL COMPONENTS
SLEEP AND IDLE MODES FOR LOW
POWER CONSUMPTION
SELECTABLE GAINS FOR BOTH V.C.M.
AND SPINDLE
10 BIT (+ SIGN + GAIN ) VCM & 8 BIT SPIN-
DLE DACs
HIGH BANDWIDTH SPEED REGULATION
LOOP (ONCE PER MECH\ELEC CYCLE AC-
CURACY)
VCM DRIVER
CURRENT SENSE CONTROL (VOLTAGE
PROPORTIONAL TO CURRENT)
300mA DRIVE CAPABILITY
TWO CURRENT RANGES FOR SEEKING
AND TRACKING
INTERNAL REGISTER FOR POWER AMP
CONTROL LINES
SPINDLE DRIVER
BEMF PROCESSING FOR SENSORLESS
MOTOR COMMUTATION
PROGRAMMABLE COMMUTATION PHASE
DELAY
PROGRAMMABLE SLEW-RATE FOR RE-
DUCED E.M.I.
0.8FOR ANY HALF BRIDGE WORST CASE
SYNCHRONOUS RECTIFICATION OF THE
B.E.M.F. DURING RETRACT OPERATION
BIPOLAR \ TRIPOLAR OPERATION
SYNTHESIZED HALL OUTPUTS
1.0 AMP DRIVE CAPABILITY
OTHER FUNCTIONS
POWER UP SEQUENCING
POWER DOWN SEQUENCING
LOW VOLTAGE SENSE
ACTUATOR RETRACTION
DYNAMIC BRAKE
THERMAL SHUTDOWN
November 1996
BICMOS TECHNOLOGY
TQFP64
ORDERING NUMBER: L6260
THERMAL & CURRENT PROTECTION
DESCRIPTION
The L6260 is single chip sensorless (DC) spindle
motor and voice coil controllers including power
stages suitable for use in small disk drives.
These devices have a serial interface for a micro-
processor running up to 10 Mega bits per second.
There are registers on chip to allow the setting of
the desired spindle speed via the on chip Fre-
quency Locked Loop (F.L.L.). No external compo-
nents are required in the sensor-less operation as
the control functions are integrated on chip (e.g.
B.E.M.F. processing, digital masking, digital delay
and sequencing).
The V.C.M. drivers uses a transconductance am-
plifier, able to provide 2 different current ranges,
suitable for seeking and tracking.
When a low voltage is detected, a Power On Re-
set (P.O.R.) is issued and the internal registers
are reset, the spindle power circuitry is tri-stated,
B.E.M.F. synchronous rectification is enabled, the
actuator retracts and then dynamic braking of the
spindle is applied.
These devices are built in BICMOS technology al-
lowing dense digital circuitry to be combined with
MOS\Bipolar power devices.
1/30




L6260 pdf, 반도체, 판매, 대치품
L6260
PIN DESCRIPTION (continued)
Pin Types: I = Input, O = Output, P = Power, A = Analog (passive)
VCM Driver and DAC
PIN # PIN NAME
DESCRIPTION
53 VCM_I_SNS1 High side of VCM sense resistor network. This pin
provides the current to the network as well as
sensing the total voltage across both sense
resistors. Sensing the total drop across both
resistors results in the low transconductance gain
feedback used for track following.
56 VCM_I_SNS2 Sensing across the lower VCM sense resistor for
high transconductance gain feedback for seek
operations.
6 VCM_COMP VCM compensation network. Typically, 200Kin
series with 100nF is connected from this pin to
Ground.
57 VCM_PLUS VCM Power Amplifier positive output terminal
55 VCM_MINUS VCM Power Amplifier negative output terminal
46 PARK_V A resistor conneced between this pin and
VCM_PLUS determines the Parking Voltage
35 VPARKOUT Output from the retract circuit. This pin is usually
directly connected to the VCM_MINUS.
Spindle Driver and DAC
PIN # PIN NAME
DESCRIPTION
40 SPN_SLEW The External.Spindle Driver Slew Rate resistor
(Rslew), typically 250K is connected from this pin to
Ground. When in nExternal Slew Rate Mode
(System Control Register B, Bit 10=0), the slew rate
is determined by:
Slew Rate = (0.5V to Rslew) X (DAC slew +1) +20pF
DAC slew = System Control Register bits 7 - 9.
36 SPN_I_COMP A seroies RC network from this pin to ground sets
the spin driver compensation. Typical a single 4nF
capacitor will provide adequate compensation.
14 SPN_I_SNS A current sensing resistor (2.5KTypical ).is
connected from this pin to ground. See the Circuit
Operation section for details.
20 COIL_A Spindle Power Amplifier output A. Also serves as
BEMF sensing for Phase A.
25 COIL_B Spindle Power Amplifier output B. Also serves as
BEMF sensing for Phase B.
29 COIL_C Spindle Power Amplifier output C. Also serves as
BEMF sensing for Phase C.
59
CTAP
Spindle Motor Center Tap connection
22 SYNTH_HALL CMOS level spindle speed output. When SYNHALL
(System Control Register B, bit 5) is set to 0, this
output switches state at every zero crossing of any
phase. With SYNHALL = 1, the output only switches
every zero crossing of Phase A.
37 SPD_COMP Change Pump RC network connection pin for FLL
mode operation.
38 SPD_COMP_S This pin allows for shorting of to the Charge Pump
HT Network resistor. This operation provides a quick
charge on the Charge Pump capacitor, reducing
settling time once desired speed is reached.
Operation is controlled by bit 9 of System Control
Register A.
39 FLL_RES Frequency Locked Loop charge pump gain resistor.
(Rep), typically 12.5K, is connected from this pin
to Ground. Change Pump current is determined by:
I = (0.5V to Rcp) X (FLLGAIN DAC +1)
FLLGAIN DAC = System Control Register B bits 0-4
PIN I\O
TRI-STATE
TYPE MAPPED? @SLEEP/@POR
A No
No
A No
A No
A No
A No
A No
AO No
No
No
No
No
No
No
PIN I\O
TRI-STATE
TYPE MAPPED? @SLEEP/@POR
A No
No
A No
AO No
A No
A No
A No
A No
DO Yes
A No
A No
No
No
No
No
No
No
Yes
No
No
A No
No
4/30

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L6260 전자부품, 판매, 대치품
L6260
ELECTRICAL CHARACTERISTICS
VCM Driver
Symbol
Io cr
Iofr
Rdson ABEF
Rdson CD
Vjump
Vdeadband
Icsbias
PSRR
BW
Parameter
Max Current Coarse Range
Max Current Fine Range
Source & Sink On Resistance
Coarse
Sink On Resistance Fine Range
Current Sense Jump
Discontinuity
Current Sense Deadband
Current Sense Bias Current
DC Power Supply Rejection
Ratio
Current Loop Bandwidth
Test Condition
Tj =125 °C ,
Iload = 300 mA
C, D VCM drive transistors
Vdd 4.5 to 5.5 V
La = 1mH Ra=40ohms
Imax =75mA
Min.
50
20
Typ.
1.0
5.0
Max.
300
75
2.5
Units
mA
mA
Ohms
10.0 Ohms
1 LSB
200 µV
1 µA
dB
KHz
Figure 1: Vjump vs. Deadband
Y(at) UNITS imax 1024
+3
Operational Area
+2 Nominal
+1
UNITS L.D.D. JT
X(in) DAC Register
Value
-1
-2
+3 +2 +1
VCM DAC
Symbol
Res
N.L.
I.N.L.
CT
Parameter
Resolution 10 Bits Resistive
Ladder Plus Sign (1 Bit)
Differential Non-Linearity
Integral Non - Linearity
Conversion Time 0 - 90 %
FSTC
Voh
Vol
PSRR
Full Scale Temperature
Coefficient
High Output Voltage
Low output Voltage
Power Supply Rejection
-3
+1 +2 +3
D94IN090
Test Condition
Unipolar
From Input Of Last Bit (for any
change of code)
0 to 125 °C
25 °C, No Load
25 °C, No Load
Min.
Typ.
11
Max. Units
bits
1 LSB
3.0 LSB
1.0 µs
250 ppm/C
0.240
50
0.250
0.260
100
V
µV
dB
7/30

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