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GS71108AU-8I 데이터시트 PDF




ETC에서 제조한 전자 부품 GS71108AU-8I은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

PDF 형식의 GS71108AU-8I 자료 제공

부품번호 GS71108AU-8I 기능
기능 128K x 8 1Mb Asynchronous SRAM
제조업체 ETC
로고 ETC 로고


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GS71108AU-8I 데이터시트, 핀배열, 회로
GS71108ATP/J/SJ/U
SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
Features
128K x 8
1Mb Asynchronous SRAM
7, 8, 10, 12 ns
3.3 V VDD
Center VDD and VSS
SOJ & TSOP-II 128K x 8-Pin Configuration
• Fast access time: 7, 8, 10, 12 ns
• CMOS low power operation: 140/120/95/80 mA at minimum
cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: 40° to 85°C
• Package line up
J: 400 mil, 32-pin SOJ package
TP: 400 mil, 32-pin TSOP Type II package
SJ: 300 mil, 32-pin SOJ package
U: 6 mm x 8 mm Fine Pitch Ball Grid Array package
Description
The GS71108A is a high speed CMOS Static RAM organized
as 131,072 words by 8 bits. Static design eliminates the need
for external clocks or timing strobes. The GS operates on a
single 3.3 V power supply and all inputs and outputs are TTL-
compatible. The GS71108A is available in a 6 mm x 8 mm
Fine Pitch BGA package, as well as in 300 mil and 400 mil
SOJ and 400 mil TSOP Type-II packages.
A3 1
32 A4
A2 2
31 A5
A1 3
30 A6
A0 4
29 A7
CE 5 32-pin
28 OE
DQ1
DQ2
6
7 400 mil SOJ
27 DQ8
26 DQ7
VDD 8
&
25 VSS
VSS 9 300 mil SOJ 24 VDD
DQ3
DQ4
WE
10
11
&
12 400 mil TSOP II
23
22
21
DQ6
DQ5
A8
A16 13
20 A9
A15 14
19 A10
A14 15
18 A11
A13 16
17 A12
Packages J, TP, and SJ
Fine Pitch BGA 128K x 8-Bump Configuration
123456
Pin Descriptions
Symbol
A0A16
DQ1DQ8
CE
WE
OE
VDD
VSS
NC
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
Ground
No connect
A NC OE A2 A6 A7 NC
B DQ1 NC A1 A5 CE DQ8
C DQ2 NC A0 A4 NC DQ7
D VSS NC NC A3 NC VDD
E VDD NC NC NC NC VSS
F DQ3 NC A14 A11 DQ5 DQ6
G DQ4 NC A15 A12 WE A8
H NC A10 A16 A13 A9 NC
Package U
6 mm x 8 mm, 0.75 mm Bump Pitch
Top View
Rev: 1.04a 10/2002
1/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.




GS71108AU-8I pdf, 반도체, 판매, 대치품
GS71108ATP/J/SJ/U
Capacitance
Parameter
Symbol
Test Condition
Input Capacitance
Output Capacitance
CIN
COUT
VIN = 0 V
VOUT = 0 V
Notes:
1. Tested at TA = 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Symbol
Input Leakage
Current
IIL
Output Leakage
Current
ILO
Output High Voltage
Output Low Voltage
VOH
VOL
Test Conditions
VIN = 0 to VDD
Output High Z
VOUT = 0 to VDD
IOH = 4 mA
ILO = +4 mA
Max
5
7
Min
1 uA
1 uA
2.4
Unit
pF
pF
Max
1 uA
1 uA
0.4 V
Power Supply Currents
Parameter Symbol
Operating
Supply
Current
IDD
Standby
Current
Standby
Current
ISB1
ISB2
Test Conditions
CE VIL
All other inputs
VIH or VIL
Min. cycle time
IOUT = 0 mA
CE VIH
All other inputs
VIH or VIL
Min. cycle time
CE VDD – 0.2 V
All other inputs
VDD – 0.2 V or 0.2 V
0 to 70°C
7 ns 8 ns 10 ns
140 mA 120 mA 95 mA
25 mA 20 mA 20 mA
2 mA
12 ns 7 ns
–40 to 85°C
8 ns 10 ns 12 ns
80 mA 145 mA 125 mA 100 mA 85 mA
15 mA 30 mA 25 mA 25 mA 20 mA
5 mA
Rev: 1.04a 10/2002
4/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.

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GS71108AU-8I 전자부품, 판매, 대치품
GS71108ATP/J/SJ/U
Write Cycle
Parameter
Write cycle time
Address valid to end of write
Chip enable to end of write
Data set up time
Data hold time
Write pulse width
Address set up time
Write recovery time (WE)
Write recovery time (CE)
Output Low Z from end of write
Write to output in High Z
Symbol
tWC
tAW
tCW
tDW
tDH
tWP
tAS
tWR
tWR1
tWLZ*
tWHZ*
-7
Min Max
7—
5—
5—
3—
0—
5—
0—
0—
0—
3—
—3
* These parameters are sampled and are not 100% tested
-8
Min Max
8—
5.5 —
5.5 —
4—
0—
5.5 —
0—
0—
0—
3—
— 3.5
-10
Min Max
10 —
7—
7—
5—
0—
7—
0—
0—
0—
3—
—4
-12
Min Max
12 —
8—
8—
6—
0—
8—
0—
0—
0—
3—
—5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev: 1.04a 10/2002
7/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.

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