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PDF L6712A Data sheet ( Hoja de datos )
| Número de pieza | L6712A | |
| Descripción | TWO-PHASE INTERLEAVED DC/DC CONTROLLER | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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L6712
L6712A
TWO-PHASE INTERLEAVED DC/DC CONTROLLER
1 Features
■ 2 PHASE OPERATION WITH
SYNCHRONOUS RECTIFIER CONTROL
■ ULTRA FAST LOAD TRANSIENT RESPONSE
■ INTEGRATED HIGH CURRENT GATE
DRIVERS: UP TO 2A GATE CURRENT
■ 3 BIT PROGRAMMABLE OUTPUT FROM
0.900V TO 3.300V OR WITH EXTERNAL REF.
■ ±0.9% OUTPUT VOLTAGE ACCURACY
■ 3mA CAPABLE AVAILABLE REFERENCE
■ INTEGRATED PROGRAMMABLE REMOTE
SENSE AMPLIFIER
■ PROGRAMMABLE DROOP EFFECT
■ 10% ACTIVE CURRENT SHARING
ACCURACY
■ DIGITAL 2048 STEP SOFT-START
■ CROWBAR LATCHED OVERVOLTAGE PROT.
■ NON-LATCHED UNDERVOLTAGE PROT.
■ OVERCURRENT PROTECTION REALIZED
USING THE LOWER MOSFET'S RdsON OR A
SENSE RESISTOR
■ OSCILLATOR EXTERNALLY ADJUSTABLE
AND INTERNALLY FIXED AT 150kHZ
■ POWER GOOD OUTPUT AND INHIBIT
FUNCTION
■ PACKAGES: SO-28 & VFQFPN-36
1.1 Applications
■ HIGH CURRENT DC/DC CONVERTERS
■ DISTRIBUTED POWER SUPPLY
2 Description
The device implements a dual-phase step-down con-
troller with a 180 phase-shift between each phase
Figure 1. Packages
SO28
VFQFPN-36 (6x6x1.0mm)
Table 1. Order Codes
Package
SO
VFQFPN
Tube
L6712D,
L6712AD
L6712Q,
L6712AQ
Tape & Reel
L6712DTR,
L6712ADTR
L6712QTR,
L6712AQTR
optimized for high current DC/DC applications.
Output voltage can be programmed through the in-
tegrated DAC from 0.900V to 3.300V; program-
ming the "111" code, an external reference from
0.800V to 3.300V is used for the regulation.
Programmable Remote Sense Amplifier avoids
use of external resistor divider and recovers loss-
es along distribution line.
The device assures a fast protection against load
over current and Over / Under voltage.An internal
crowbar is provided turning on the low side mosfet
if Over-voltage is detected.
Output current is limited working in Constant Cur-
rent mode: when Under Voltage is detected, the
device resets, restarting operation.
June 2005
Rev. 3
1/29
1 page  
L6712A L6712
Table 4. Electrical Characteristcs (continued)
(VCC = 12V±10%, TJ = 0°C to 70°C unless otherwise specified)
Symbol
PROTECTIONS
PGOOD
OVP
UVP
VPGOODL
IPGOODH
Parameter
Upper Threshold
Lower Threshold
Over Voltage Threshold
Under Voltage Trip
PGOOD Voltage Low
PGOOD Leakage
Test Condition
VSEN Rising
VSEN Falling
VSEN Rising
VSEN Falling
IPGOOD = -4mA
VPGOOD = 5V
Min. Typ. Max.
108 112 115
84 88 92
115 122 130
55 60 65
0.4
1
Note: 1. Output voltage is specified including Error Amplifier Offset in the trimming chain. Remote Amplifier is not included.
Unit
%
%
%
%
V
µA
Table 5. Voltage Identification (VID) Codes.
VID2
1
1
1
1
0
0
0
0
VID1
1
1
0
0
1
1
0
0
VID0
1
0
1
0
1
0
1
0
Output Voltage (V)
Ext. Ref.
0.900
1.250
1.500
1.715
1.800
2.500
3.300
Table 6. Pin Function
N. (*)
SO VFQFPN
1 33
Name
LGATE1
2 34 VCCDR
3 35 PHASE1
4 36 UGATE1
5 2 BOOT1
6 4 VCC
7 5,6 SGND
8 7 COMP
98
FB
Description
Channel 1 LS driver output.
A little series resistor helps in reducing device-dissipated power.
LS drivers supply: it can be varied from 5V to 12V buses.
Filter locally with at least 1µF ceramic cap vs. PGND.
Channel 1 HS driver return path. It must be connected to the HS1 mosfet source
and provides the return path for the HS driver of channel 1.
Channel 1 HS driver output.
A little series resistor helps in reducing device-dissipated power.
Channel 1 HS driver supply. This pin supplies the relative high side driver.
Connect through a capacitor (100nF typ.) to the PHASE1 pin and through a diode
to VCC (cathode vs. boot).
Device supply voltage. The operative supply voltage is 12V ±10%.
Filter with 1µF (Typ.) capacitor vs. GND.
All the internal references are referred to this pin. Connect it to the PCB signal
ground.
This pin is connected to the error amplifier output and is used to compensate the
control feedback loop.
This pin is connected to the error amplifier inverting input and is used to
compensate the control feedback loop.
5/29
5 Page 
L6712A L6712
3.3 DRIVER SECTION
The integrated high-current drivers allow using different types of power MOS (also multiple MOS to reduce
the RdsON), maintaining fast switching transition.
The drivers for the high-side mosfets use BOOTx pins for supply and PHASEx pins for return. The drivers
for the low-side mosfets use VCCDR pin for supply and PGND pin for return. A minimum voltage of 4.6V
at VCCDR pin is required to start operations of the device.
The controller embodies a sophisticated anti-shoot-through system to minimize low side body diode con-
duction time maintaining good efficiency saving the use of Schottky diodes in parallel to the LS mosfets.
The dead time is reduced to few nanoseconds assuring that high-side and low-side mosfets are never
switched on simultaneously: when the high-side mosfet turns off, the voltage on its source begins to fall;
when the voltage reaches 2V, the low-side mosfet gate drive is applied with 30ns delay. When the low-
side mosfet turns off, the voltage at LGATEx pin is sensed. When it drops below 1V, the high-side mosfet
gate drive is applied with a delay of 30ns. If the current flowing in the inductor is negative, the source of
high-side mosfet will never drop. To allow the turning on of the low-side mosfet even in this case, a watch-
dog controller is enabled: if the source of the high-side mosfet don't drop for more than 240ns, the low side
mosfet is switched on so allowing the negative current of the inductor to recirculate. This mechanism al-
lows the system to regulate even if the current is negative.
The BOOTx and VCCDR pins are separated from IC's power supply (VCC pin) as well as signal ground
(SGND pin) and power ground (PGND pin) in order to maximize the switching noise immunity. The sepa-
rated supply for the different drivers gives high flexibility in mosfet choice, allowing the use of logic-level
mosfet. Several combination of supply can be chosen to optimize performance and efficiency of the appli-
cation. Power conversion is also flexible; 5V or 12V bus can be chosen freely.
The peak current is shown for both the upper and the lower driver of the two phases in Figure 7. A 10nF
capacitive load has been used. For the upper drivers, the source current is 1.9A while the sink current is
1.5A with VBOOT -VPHASE = 12V; similarly, for the lower drivers, the source current is 2.4A while the sink
current is 2A with VCCDR = 12V.
Figure 7. Drivers peak current: High Side (left) and Low Side (right)
CH3 = HGATE1; CH4 = HGATE2
CH3 = LGATE1; CH4 = LGATE2
3.4 CURRENT READING AND OVER CURRENT
The current flowing trough each phase is read using the voltage drop across the low side mosfets RdsON
or across a sense resistor (RSENSE) in series to the LS mosfet and internally converted into a current. The
transconductance ratio is issued by the external resistor Rg placed outside the chip between ISENx and
PGNDSx pins toward the reading points. The differential current reading rejects noise and allows to place
sensing element in different locations without affecting the measurement's accuracy. The current reading
11/29
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet L6712A.PDF ] | |
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