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PDF MK4564E-15 Data sheet ( Hoja de datos )
| Número de pieza | MK4564E-15 | |
| Descripción | 65536 x 1-Bit DRAM | |
| Fabricantes | United Technologies Mostek | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MK4564E-15 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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l !UNITED
TECHNOLOGIES
MOSTEK
MEMORY
COMPONENTS
65,536 x 1-BIT DYNAMIC RAM
MK4564(P/N/J/E)-15/20
FEATURES
o Recognized industry standard 16-pin configuration from
Mostek
o Single +5V (± 10%) supply operation
o On chip substrate bias generator for optimum
performance
o Low power: 300 mW active, max
22 mW standby, max
o 150 ns access time, 260 ns cycle time (MK4564-15)
200 ns access time, 330 ns cycle time (MK4564-20)
o Extended DOUT hold using CAS control (Hidden Refresh)
o Common I/O capability using "early write"
o Read, Write, Read-Write, Read-Modify-Write and Page-
Mode capability
•
o All inputs TTL compatible, low capacitance, and
protected against static charge
o Scaled POLY 5™ technology
o 128 refresh cycles (2 msec)
Pin 9 is not needed for refresh
DESCRIPTION
The MK4564 is the new generation dynamic RAM.
Organized 65,536 words by 1 bit, it is the successor to the
industry standard MK4116. The MK4564 utilizes Mostek's
Scaled POLY 5 process technology as well as advanced
circuit techniques to provide wide operating margins, both
internally and to the system user. The use of dynamic
circuitry throughout, including the 512 sense amplifiers,
assures that power dissipation is minimized without any
sacrifice in speed or internal and external operating
margins. Refresh characteristics have been chosen to
maximize yield (low cost to user) while maintaining
compatibility between dynamic RAM generations.
PIN FUNCTIONS
Multiplexed address inputs (a feature dating back to the
industry standard MK4096, 1973) permit the MK4564 to
be packaged in a standard 16-pin DIP with only 15 pins
required for basic functionality. The MK4564 is designed to
be compatible with the JEDEC standards for the 64K x 1
dynamic RAM.
The output ofthe MK4564 can be held valid up to 10 ~sec by
holding CAS active low. This is quite useful since refresh
cycles can be performed while holding data valid from a
previous cycle. This feature is referred to as Hidden Refresh.
The 64K RAM from Mostek is the culmination of several
years of circuit and process development, proven in
predecessor products.
PIN OUT
Ao-A 7
CAS(~)
DIN (D)
DouT(Q)
Address Inputs
Column Address
Strobe
Data In
Data Out
RAS (RE)
WRITE (W)
Vee
Vss
N/C
Row Address
Strobe
Read/
Write Input
Power (5V)
GND
Not Connected
DUAL·IN·LlNE PACKAGE
16 v••
16 mice)
14 DourlQ)
13 As
12 A.
11 A.
10 A.
9 A7
LEAD LESS CHIP CARRIER
en0IN1D) N C \Iss
retl
1\2.._\
\1\ \181
I I L_.1
:1~
1,,-"
WRITelWI .!.J
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L~ AS
AO ~J
[~ A3
[I:2 A4
r;1 r~l r,~i r,~i
A1 'Icc A7 AI5
Available soon in MIL-STD-883 Class B (MKB).
IV·71
1 page  
READ CYCLE
RAS
V'H_
V'L-
CAS V'H_
V'L-
ADDRESSES V'H_
V'L-
WRi'i'E
Dour
V'H_
V'L-
V OH _
VOL -
WRITE CYCLE (EARLY WRITE)
i . - - tCAC
OPEN
~
VALID
DATA
tOFF
RAS
V'H_
V'L -
CAS
V'H-
V'L -
V'H_
ADDRESSES
V'L -
WRITE
V'L -
V'H_
D'N
V'L -
Dour
VOH -
VOL-
tDHA
OPEN
IV-75
•
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet MK4564E-15.PDF ] | |
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