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PDF STA8088EXG Data sheet ( Hoja de datos )

Número de pieza STA8088EXG
Descripción Flexible GPS/Galileo/Glonass/QZSS receiver
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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STA8088EXG
Flexible GPS/Galileo/Glonass/QZSS receiver with
high performance processing (ARM9)
Data brief production data
Features
STMicroelectronics® 3rd generation
positioning receiver with 32 tracking channels
and 2 fast acquisition channels compatible
with GPS, Galileo, Glonass and QZSS systems
Embedded RF front-end with built-in LNA
-162dBm indoor sensitivity (tracking mode)
Fast TTFF < 1 s in hot start and 35 s in cold
start
Support of ST-AGPSTM Multimode Assisted
GPS (extended ephemeris solution)
High performance ARM946 MCU (up to
208 MHz)
256 Kbyte embedded TCM/SRAM
FSMC external memory interface (NAND, NOR
and SRAM)
External SQI Flash interface
One 16-bit Extended Function Timer (EFT)
with input capture/ output compare and PWM.
Four 32-bit free running timers/ counters
Real Time Clock (RTC) circuit
3 UARTs (one full for modem support)
1 I2C master/slave interface
1 Synchronous Serial Port (SSP, Motorola-SPI
supported)
USB2.0 dual role full speed (12 MHz) with
integrated physical layer transceiver
2 Secure-Digital Multimedia Memory Card
Interfaces (SDMMC)
2 Controller Area Network (CAN)
1 Multichannel Serial Port (MSP)
GPIO port for a total of up to 64 GPIOs
8-channels ADC (10 bit)
TFBGA169
Selectable 1.8 V or 3.3 V I/Os for specific I/O
ports
3 embedded 1.8 V voltage regultators
Operating condition:
– VDD12: 1.2 V ±10 %
– VDD18/RF18: 1.8 V ±5 %
– VLPVR: 1.62 V to 3.6 V
– VddIO: 1.8 V -5 %/ +10 %; 3.3 V ±10 %
Package:
– TFBGA169 9 x 9 x 1.2 mm 0.65 pitch
– TFBGA169 12 x 12 x 1.2 mm 0.8 pitch
Ambient temperature range: -40/ +85 °C
Description
STA8088EXG is a single die standalone
positioning receiver IC working on multiple
constellations (GPS/Galileo/Glonass/QZSS).
By combining the ARM946 microcontroller core
with the large number of peripherals/ interfaces,
STA8088EXG provides a highly-flexible and cost
effective solution for hand-held and telematic
applications.
The device is the ideal solution for sensor-based
and sensor-less ST Dead Reckoning
technologies which enhance positioning accuracy
even in areas without GNSS signals, like tunnels
and indoor parking.
March 2012
Doc ID 022725 Rev. 2
This is information on a product in full production. For further information contact your local STMicroelectronics sales
office.
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STA8088EXG pdf
STA8088EXG
1 Overview
Overview
STA8088EXG is an integrated System-On-Chip device designed for a highly-flexible and
cost effective solution for vehicle, hand-held navigation and telematic applications.
It combines a high performance ARM946 microprocessor with embedded enhanced
peripherals and I/O capabilities, RF front-end and base band processor to support GPS,
Galileo, Glonass and QZSS satellite systems.
It also provides clock generation via PLL, backup logic with real time clock and it supports
USB2.0 standard at full speed.
STA8088EXG is software compatible with the ARM processor family. The device is power
supplied with 1.8 V and uses three on-chip voltage regulators to internally supply the RF
front-end, core logic the backup logic. In order to reduce the power consumption the chip
can be directly powered with 1.2 V bypassing the embedded voltage regulators.
I/O lines are compatible with 1.8 V and 3.3 V.
The chip, using STMicroelectronics CMOSRF technology, is housed in a TFBGA169
(9 x 9 x 1.2 mm) and TFBGA169 (12 x 12 x 1.2 mm) packages.
The Automotive Grade devices (see Figure 4: Ordering information scheme) fulfilling high
quality and service level automotive market requirements, is the ideal solution for OEM
telematic applications.
Doc ID 022725 Rev. 2
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STA8088EXG arduino
STA8088EXG
Pin description
2.6 FSMC external memory interface pins
Table 6. FSMC memory interface pins
Symbol
I/O Voltage I/O
Functions
FSMC_Data[15:0] VDD_IOR3 I/O FSMC EMI data bus
FSMC_Add[23:0](1)(2) VDD_IOR3 O FSMC EMI address bus
FSMC _OutEN
VDD_IOR3 O FSMC EMI output enable
FSMC _WEN
VDD_IOR3 O FSMC EMI write enable
FSMC _WTn
VDD_IOR3 I FSMC EMI wait (SNOR, CRAM)
FSMC _BLn[0,1]
VDD_IOR3 O FSMC EMI byte lane
FSMC _CLK
VDD_IOR3 O FSMC EMI clk
FSMC _ADV
VDD_IOR3 O FSMC EMI address valid
FSMC _CS0
VDD_IOR3
O
FSMC EMI chip select for external memory
bank 0
FSMC _CS1
VDD_IOR3
O
FSMC EMI chip select for external memory
bank 1
FSMC _CS2
VDD_IOR3
O
FSMC EMI chip select for external memory
bank 2
FSMC _CS3/
iopwrsel_r3
VDD_IOR3
O
FSMC EMI chip select for external memory
bank 3 / I/O ring 3 power selection
1. FSMC_Add[23:0] are multiplexed with P1[31:8] - see Table 9
2. In case of NAND memory usage the
FSMC_Add16 is used as CLE
FSMC_Add17 is used as ALE
TFBGA169
C13, E10, B10,
E11, A12, A11,
G10, F10, A10,
D11, C10, G9, C9,
H10, B9, A9
F7, C7, D7, F6,
E6, F5, B7, E7,
F8, A7, B8, D8,
F9, E9, C8, H9,
A8, E8, A6, B6,
C6, D6, A5, B5
E5
D5
C5
B13, B12
D9
D10
D13
D12
C11
C12
2.7 SQI pins
Table 7. SQI pins
Symbol
I/O Voltage
SQI_SIO3
VDD_IOR4
SQI_SIO2
VDD_IOR4
SQI_SIO1/SO
VDD_IOR4
SQI_SIO0/SI
VDD_IOR4
I/O Functions
I/O SQI Flash data I/O 3
I/O SQI Flash data I/O 2
I/O SQI Flash data I/O 1 / ser. O
I/O SQI Flash data I/O 0 / ser. I
TFBGA169
N10
L10
M10
N11
Doc ID 022725 Rev. 2
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