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PDF 74AC132 Data sheet ( Hoja de datos )
| Número de pieza | 74AC132 | |
| Descripción | Quad 2-Input NAND Schmitt Trigger | |
| Fabricantes | ON Semiconductor | |
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MC74AC132, MC74ACT132
Quad 2-Input NAND Schmitt
Trigger
High−Performance Silicon−Gate CMOS
The MC74AC/74ACT132 contains four 2−input NAND gates
which are capable of transforming slowly changing input signals into
sharply defined, jitter−free output signals. In addition, they have
greater noise margin than conventional NAND gates.
Each circuit contains a 2−input Schmitt trigger. The Schmitt trigger
uses positive feedback to effectively speed−up slow input transitions,
and provide different input threshold voltages for positive and
negative-going transitions. This hysteresis between the positive−going
and negative−going input threshold is determined by resistor ratios
and is essentially insensitive to temperature and supply voltage
variations.
Features
• Schmitt Trigger Inputs
• Outputs Source/Sink 24 mA
• ′ACT132 Has TTL Compatible Inputs
• These are Pb−Free Devices
VCC
14 13 12 11 10
9
8
www.onsemi.com
MARKING
DIAGRAM
14
14
1
SOIC−14
D SUFFIX
CASE 751A
xxx132G
AWLYWW
1
xxx = AC or ACT
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
1234567
GND
Figure 1. Pinout; 14−Lead Packages Conductors
(Top View)
FUNCTION TABLE
Inputs
AB
LL
LH
HL
HH
H = HIGH Voltage Level
Output
Y
H
H
H
L
L = LOW Voltage Level
© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. 8
1
Publication Order Number:
MC74AC132/D
1 page  
MC74AC132, MC74ACT132
INPUT CHARACTERISTICS (unless otherwise specified)
Symbol
Parameter
VCC
(V)
Vt +
Maximum Positive
Threshold
3.0
4.5
5.5
Vt −
Minimum Negative
Threshold
3.0
4.5
5.5
Vh(max)
Maximum Hysteresis
3.0
4.5
5.5
Vh(min)
Minimum Hysteresis
3.0
4.5
5.5
74AC
2.2
3.2
3.9
0.5
0.9
1.1
1.2
1.4
1.6
0.3
0.4
0.5
74ACT Unit
Test Conditions
2.0 V TA = Worst Case
0.8 V TA = Worst Case
1.2 V TA = Worst Case
0.4 V TA = Worst Case
CAPACITANCE
Symbol
Parameter
CIN Input Capacitance
CPD Power Dissipation Capacitance
Value
Typ
4.5
30
Unit
pF
pF
Test Conditions
VCC = 5.0 V
VCC = 5.0 V
ORDERING INFORMATION
Device
Package
Shipping†
MC74AC132DG
SOIC−14
(Pb−Free)
55 Units/Rail
MC74AC132DR2G
SOIC−14
(Pb−Free)
2500/Tape & Reel
MC74ACT132DG
SOIC−14
(Pb−Free)
55 Units/Rail
MC74ACT132DR2G
SOIC−14
(Pb−Free)
2500/Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 74AC132.PDF ] | |
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