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PDF N141C6-L03 Data sheet ( Hoja de datos )

Número de pieza N141C6-L03
Descripción TFT LCD Module
Fabricantes CMI MEI 
Logotipo CMI MEI Logotipo



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No Preview Available ! N141C6-L03 Hoja de datos, Descripción, Manual

Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Feb. 27, 2009
Model No.: N141C6 - L03
Tentative
TFT LCD Tentative Specification
MODEL NO.: N141C6 - L03
Customer:
Approved by:
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N141C6-L03 pdf
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Feb. 27, 2009
Model No.: N141C6 - L03
Tentative
2 ABSOLUTE MAXIMUM RATINGS
2.1 ABSOLUTE RATINGS OF ENVIRONMENT
Item Symbol
Storage Temperature
Operating Ambient Temperature
Shock (Non-Operating)
Vibration (Non-Operating)
TST
TOP
SNOP
VNOP
Note (1) (a) 90 %RH Max. (Ta Љ 40 ºC).
Value
Min. Max.
-20 +60
0 +50
- 220/2
- 1.5
Unit
ºC
ºC
G/ms
G
(b) Wet-bulb temperature should be 39 ºC Max. (Ta > 40 ºC).
(c) No condensation.
Note (2) The temperature of panel display surface area should be 0 ºC Min. and 60 ºC Max..
Relative Humidity (%RH)
Note
(1)
(1), (2)
(3), (5)
(4), (5)
100
90
80
60
Operating Range
40
20
10 Storage Range
-40 -20
0 20 40 60 80
Temperature (ºC)
Note (3) 1 time for ± X, ± Y, ± Z. for Condition (220G / 2ms) is half Sine Wave,.
Note (4) 10 ~ 500 Hz, 30 min / Cycle, 1 cycles for each X, Y, Z axis.
Note (5) At testing Vibration and Shock, the fixture in holding the module has to be hard and rigid
enough so that the module would not be twisted or bent by the fixture.
The fixing condition is shown as below:
At Room Temperature
LCD Module
Side Mount Fixing Screw
Gap=2mm
Bracket
Side Mount Fixing Screw
Stage
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N141C6-L03 arduino
Global LCD Panel Exchange Center
www.panelook.com
Issued Date: Feb. 27, 2009
Model No.: N141C6 - L03
Tentative
5 INPUT TERMINAL PIN ASSIGNMENT
5.1 TFT LCD MODULE
Pin Symbol
Description
1
VSS
Ground
2
VDD
Power Supply (3.3V typ.)
3
VDD
Power Supply (3.3V typ.)
4
VEDID
DDC 3.3V Power
5 NC No Connection (Reserved for CMO test)
6 CLKEDID DDC Clock
7 DATAEDID DDC Data
8 RXO0- - LVDS differential data input (Odd)
9
RXO0+
+ LVDS differential data input (Odd)
10
VSS
Ground
11
RinO1-
- LVDS differential data input (Odd)
12
RinO1+
+ LVDS differential data input (Odd)
13
VSS
Ground
14
RinO2-
- LVDS differential data input (Odd)
15
RinO2+
+ LVDS differential data input (Odd)
16
VSS
Ground
17
RXOC-
- LVDS differential clock input (Odd)
18
RXOC+
+ LVDS differential clock input (Odd)
19
VSS
Ground
20
RinE0-
- LVDS differential data input (Even)
21
RinE0+
+ LVDS differential data input (Even)
22
VSS
Ground
23
RinE1-
- LVDS differential data input (Even)
24
RinE1+
+ LVDS differential data input (Even)
25 VSS
Ground
26
RinE2-
- LVDS differential data input (Even)
27
RinE2+
+ LVDS differential data input (Even)
28
VSS
Ground
29
RXEC-
- LVDS differential clock input (Even)
30
RXEC+
+ LVDS differential clock input (Even)
31 LED_GND LED Ground
32 LED_GND LED Ground
33 LED_GND LED Ground
34 NC No Connection (Reserve)
35 LED_PWM PWM Control Signal of LED Converter
36 LED_EN Enable Control Signal of LED Converter
37 NC No Connection (Reserve)
38 LED_VCCS LED Power
39 LED_VCCS LED Power
40 LED_VCCS LED Power
Note (1) Connector Part No.ΚI-PEX 20455-040E-12 or equivalent
Polarity
Remark
Negative R0-R5, G0
Positive
Negative G1-G5, B0-B1
Positive
Negative B2-B5, HS, VS, DE
Positive
Negative
Positive
Negative R0-R5, G0
Positive
Negative G1-G5, B0-B1
Positive
Negative B2-B5, HS, VS, DE
Positive
Negative
Positive
Note (2) User’s connector Part NoΚI-PEX 20453-040T-12 or equivalent
Note (3) The first pixel is odd as shown in the following figure.
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