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부품번호 | GLT5160L16I-10FJ 기능 |
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기능 | 16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM | ||
제조업체 | ETC | ||
로고 | |||
GLT5160L16
16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM
ADVANCED
FEATURES
u Single 3.3 V ±0.3 V power supply
u Clock frequency 100 MHz / 125 MHz / 143 MHz/
166 MHz
u Fully synchronous operation referenced to clock rising edge
u Dual bank operation controlled by BA (Bank Address)
u CAS latency- 2 / 3 (programmable)
u Burst length- 1 / 2 / 4 / 8 & Full Page (programmable)
u Burst type- sequential / interleave (programmable)
u Industrial grade available
GENERAL DESCRIPTION
The GLT5160L16 is a 2-bank x 524288-word x 16-bit Synchro-
nous DRAM, with LVTTL interface. All inputs and outputs are
referenced to the rising edge of CLK. The GLT5160L16 achieves
u Byte control by DQMU and DQML
u Column access - random
•u Auto precharge / All bank precharge controlled by A[10]
•u Auto refresh and Self refresh
u 4096 refresh cycles / 64 ms
u LVTTL Interface
u 400-mil, 50-Pin Thin Small Outline Package (TSOP II) with
0.8 mm lead pitch
•u 60-Ball, 6.4mmx10.1mm VFBGA package with 0.65mm Ball
pitch & 0.35mm Ball diameter.
very high speed data rate up to 166 MHz, and is suitable for main
memory or graphic memory in computer systems.
DEC. 2003 (Rev.2.4) 1
Function Truth Table [1] [2]
Current State
CS RAS CAS WE
Address [3]
Command
IDLE
H X X XX
DESEL
L
HH
HX
NOP
L H H L BA
TBST
L H L X BA, CA, A[10]
READ / WRITE
L L H H BA, RA
ACT
L L H L BA, A[10]
PRE / PREA
L L L HX
REFA
L L L L Op-Code, Mode-Add MRS
ROW ACTIVE
H X X XX
DESEL
L H H HX
NOP
L H H L BA
TBST
L H L H BA, CA, A[10]
READ / READA
L H L L BA, CA, A[10]
WRITE / WRITEA
READ
L L H H BA, RA
ACT
L L H L BA, A[10]
PRE / PREA
L L L HX
REFA
L L L L Op-Code, Mode-Add MRS
H X X XX
DESEL
L H H HX
NOP
L H H L BA
TBST
L H L H BA, CA, A[10]
READ / READA
L H L L BA, CA, A[10]
WRITE / WRITEA
WRITE
L L H H BA, RA
ACT
L L H L BA, A[10]
PRE / PREA
L L L HX
REFA
L L L L Op-Code, Mode-Add MRS
H X X XX
DESEL
L H H HX
NOP
L H H L BA
TBST
L H L H BA, CA, A[10]
READ / READA
L H L L BA, CA, A[10]
WRITE / WRITEA
L L H H BA, RA
ACT
L L H L BA, A[10]
PRE / PREA
L L L HX
REFA
L L L L Op-Code, Mode-Add MRS
Action [4]
NOP
NOP
ILLEGAL [5]
ILLEGAL [5]
Bank Active, Latch RA
NOP [6]
Auto-Refresh [7]
Mode Register Set [7]
NOP
NOP
NOP
Begin Read, Latch CA, Determine Auto-
Precharge
Begin Write, Latch CA, Determine Auto-
Precharge
Bank Active / ILLEGAL [5]
Precharge / Precharge All
ILLEGAL
ILLEGAL
NOP (Continue Burst to END)
NOP (Continue Burst to END)
Terminate Burst
Terminate Burst, Latch CA, Begin New
Read, Determine Auto-Precharge [8]
Terminate Burst, Latch CA, Begin Write,
Determine Auto-Precharge [8]
Bank Active / ILLEGAL [5]
Terminate Burst, Precharge
ILLEGAL
ILLEGAL
NOP (Continue Burst to END)
NOP (Continue Burst to END)
Terminate Burst
Terminate Burst, Latch CA, Begin Read,
Determine Auto-Precharge [8]
Terminate Burst, Latch CA, Begin Write,
Determine Auto-Precharge [8]
Bank Active / ILLEGAL [5]
Terminate Burst, Precharge
ILLEGAL
ILLEGAL
4 G-LINK Technology
DEC. 2003 (Rev. 2.4)
4페이지 Function Truth Table for CKE [1]
Current State
SELF-REFRESH [2]
POWER DOWN
ALL BANKS IDLE [3]
ANY STATE other than
listed above
CKE n-
1
H
L
L
L
L
L
L
H
L
L
H
H
H
H
H
H
H
L
H
H
L
L
CKE n
X
H
H
H
H
H
L
X
H
L
H
L
L
L
L
L
L
X
H
L
H
L
CS
X
H
L
L
L
L
X
X
X
X
X
L
H
L
L
L
L
X
X
X
X
X
RAS
X
X
H
H
H
L
X
X
X
X
X
L
X
H
H
H
L
X
X
X
X
X
CAS
X
X
H
H
L
X
X
X
X
X
X
L
X
H
H
L
X
X
X
X
X
X
WE
X
X
H
L
X
X
X
X
X
X
X
H
X
H
L
X
X
X
X
X
X
X
Add Action
X INVALID
X Exit Self-Refresh (Idle after tRC)
X Exit Self-Refresh (Idle after tRC)
X ILLEGAL
X ILLEGAL
X ILLEGAL
X NOP (Maintain Self-Refresh)
X INVALID
X Exit Power Down to Idle
X NOP (Maintain Self-Refresh)
X Refer to Function Truth Table
X Enter Self-Refresh
X Enter Power Down
X Enter Power Down
X ILLEGAL
X ILLEGAL
X ILLEGAL
X Refer to Current State = Power Down
X Refer to Function Truth Table
X Begin CLK Suspend at Next Cycle [4]
X Exit CLK Suspend at Next Cycle [4]
X Maintain CLK Suspend
1. H = High Level, L= Low Level, X = Don't Care.
2. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup time must be satisfied before any command other than EXIT.
3. Power-Down and Self-Refresh can be entered only from the All Banks Idle State.
4. Must be legal command.
G-LINK Technology
DEC. 2003 (Rev.2.4)
7
7페이지 | |||
구 성 | 총 30 페이지수 | ||
다운로드 | [ GLT5160L16I-10FJ.PDF 데이터시트 ] |
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부품번호 | 상세설명 및 기능 | 제조사 |
GLT5160L16I-10FJ | 16M (2-Bank x 524288-Word x 16-Bit) Synchronous DRAM | ETC |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |