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부품번호 | 21140A 기능 |
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기능 | PCI Fast Ethernet LAN Controller Hardware Reference Manual | ||
제조업체 | Digital Equipment | ||
로고 | |||
전체 30 페이지수
DIGITAL Semiconductor 21140A
PCI Fast Ethernet LAN Controller
Hardware Reference Manual
Order Number: EC–QN7NF–TE
Revision/Update Information: This is a revised document. It supersedes the
DIGITAL Semiconductor 21140A PCI Fast
Ethernet LAN Controller Hardware Reference
Manual, EC–QN7NE–TE.
Digital Equipment Corporation
Maynard, Massachusetts
http://www.digital.com/semiconductor
March 1998
While DIGITAL believes the information included in this publication is correct as of the date of publication, it is
subject to change without notice.
Please read the Support, Products, and Documentation section in this document to determine how to obtain current
product update and errata information.
Digital Equipment Corporation makes no representations that the use of its products in the manner described in this
publication will not infringe on existing or future patent rights, nor do the descriptions contained in this publication
imply the granting of licenses to make, use, or sell equipment or software in accordance with the description.
©Digital Equipment Corporation 1998. All rights reserved.
Printed in U.S.A.
DIGITAL, DIGITAL Semiconductor, DNA, and the DIGITAL logo are trademarks of Digital Equipment
Corporation.
DIGITAL Semiconductor is a Digital Equipment Corporation business.
IEEE is a registered trademark of The Institute of Electrical and Electronics Engineers, Inc.
MicroWire is a registered trademark of BankAmerica Corporation.
All other trademarks and registered trademarks are the property of their respective owners.
4페이지 4.3.5.3
4.3.5.4
4.3.6
4.3.6.1
4.3.6.2
4.3.6.3
Receive Process Suspended . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receive Process State Transitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmit Process . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frame Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmit Polling Suspended. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Transmit Process State Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–36
4–36
4–37
4–37
4–38
4–39
5 Host Bus Operation
5.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Bus Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Bus Slave Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.1
Slave Read Cycle (I/O or Memory Target). . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.2
Slave Write Cycle (I/O or Memory Target). . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3.3
Configuration Read and Write Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4 Bus Master Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4.1
Bus Arbitration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4.2
Memory Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4.3
Memory Write Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5 Termination Cycles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5.1
Slave-Initiated Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5.2
Master-Initiated Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5.2.1
21140A-Initiated Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5.2.1.1
Normal Completion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5.2.1.2
Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5.2.1.3
Master Abort . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5.2.2
Memory-Controller-Initiated Termination . . . . . . . . . . . . . . . . . . . . . . . .
5.5.2.2.1
Target Abort . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5.2.2.2
Target Disconnect Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.5.2.2.3
Target Retry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.6 Parity. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.7 Parking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5–1
5–2
5–2
5–3
5–4
5–5
5–6
5–6
5–7
5–8
5–9
5–9
5–10
5–11
5–11
5–11
5–11
5–12
5–12
5–13
5–14
5–15
5–16
6 Network Interface Operation
6.1
6.1.1
6.1.2
6.1.2.1
6.1.2.2
6.2
6.3
6.3.1
6.3.1.1
MII/SYM Port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100BASE-T Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Interface Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Serial Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Media Access Control Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
MAC Frame Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ethernet and IEEE 802.3 Frames. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6–1
6–1
6–2
6–3
6–4
6–6
6–6
6–7
6–8
v
7페이지 | |||
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