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PDF FCM8531 Data sheet ( Hoja de datos )
| Número de pieza | FCM8531 | |
| Descripción | MCU Embedded and Configurable 3-Phase PMSM / BLDC Motor Controller | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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November 2013
FCM8531 — MCU Embedded and Configurable
3-Phase PMSM / BLDC Motor Controller
Features
Advanced Motor Controller (AMC)
Configurable Processing Core
- Sensorless Field-Oriented Control (FOC) with
Speed Integral Method
- Sensorless FOC with Sliding Mode
- Hall Interface
Space Vector Modulation (SVM)
Sine-Wave & Square-Wave Generator
Programmable Current Leading Phase Control
Programmable Soft-Switching Control (Dead Time)
FCM8531RQY Certified by UL for IEC-60730-1
Class B Compliance with recognized marking:
Embedded MCU
MCS® 51 Compatible
63% of Instructions’ Execution Cycle <3 System
Clocks (3T)
Memory Size:
- 12 KB Flash Program Memory
- 256 +1 KB SRAM Data Memory
Extended16-Bit Multiplication / Division Unit (MDU)
≤17 General-Purpose Input / Output (GPIO) Pins
Full Duplex Serial Interface (UART)
I2C Interface
Serial Peripheral Interface (SPI)
Three External Interrupts
Three 16-Bit Timers
Programmable 15-Bit Watchdog Timer (WDT)
Built-in Power-On Reset (POR)
Built-in Clock Generator
Two-Level Program Memory Lock
ADC and DAC
8-Channel, 10-Bit ADC
- Auto-Trigger Sample & Hold
- Four Trigger Mode Selections
- Three Pre-AMP Gain Selections
1-Channel, 8-Bit DAC
Protections
Three Levels of Over-Current Protection (OCP)
Power Management
Idle Mode, Stop Mode, Sleep Mode
Development Supports
In System Programming (ISP)
On-Chip Debug Support (OCDS)
Description
The FCM8531 is an application-specific parallel-core
processor for motor control that consists of an
Advanced Motor Controller (AMC) processor and a
MCS® 51-compatible MCU processor. The AMC is the
core processor specifically designed for motor control. It
integrates a configurable processing core and peripheral
circuits to perform FOC and “Sensorless” motor control.
System control, user interface, communication interface,
and input/output interface can be programmed through
the embedded MCS® 51 for different motor applications.
The advantage of FCM8531’s parallel-core processors
is that the two processors can work independently and
complement each other. The AMC processes the tasks
dedicated for motor controls, such as the motor control
algorithms, PWM controls, current sensing, real-time
over-current protection, and motor angle calculation.
The embedded MCU provides motor control commands
to the AMC to perform motor control activities through a
communication interface. This approach reduces the
software burden and simplifies the control system
program because complex motor control algorithms are
executed in the AMC. Fairchild provides the Motor
Control Development System (MCDS) IDE and MCDS
Programming Kit for users to develop software, compile
programs, and perform online debugging.
To meet IEC 60730-1 Class B safety standard for
household appliances, FCM8531 has FCM8531RQY
version in its family that has been certificated by UL for
the compliance. Users can directly utilize the UL
certificated AMC to quicken product development cycle
for electronic controlled PMSM/BLDC motor.
Applications
Sensorless IPM / SPM, BLDC / PMSM Motor
Fan, Blower, Pump, Compressor, etc.
Related Resources
AN-8202— FCM8531 User Manual - Hardware
Description
AN-8203— FCM8531 User Manual - Instruction Set
User Guide for FCM8531 Evaluation Board
© 2012 Fairchild Semiconductor Corporation
FCM8531 • Rev. 1.0.2
www.fairchildsemi.com
1 page  
Pin Definitions (Continued)
Pin # Name
P15
MOSI
6 TX
SDA
TDI
P16
MISO
7 SCL
RX
TMS
P17
SCK
8 SDA
TX
TCK
P24
CC0
9
T0
T2
P25
CC1
10
T1
T2EX
P26
CC2
11
T2
T0
12 RST
13 VC
14 VB
15 VA
ADC3
16
AOUT
17 AVSS
18 ADC0
19 IC
Type
Description
I/O Bit 5 of Port 1. General-purpose input/output pin with internal pull-up resistor.
I/O Master Data Output and Slave Data Input (SPI)
O Serial Data Transmit (UART)
I/O Serial Data (I2C)
I Test Data Input. Test data input in OCDS Mode.
I/O Bit 6 of Port 1. General-purpose input/output pin with internal pull-up resistor.
I/O Master Data Input and Slave Data Output (SPI)
I/O Serial Clock (I2C)
I Data Receive (UART)
I Test Mode Select. Test mode select in OCDS Mode.
I/O Bit 7 of Port 1. General-purpose input/output pin with internal pull-up resistor.
I/O Serial Clock (SPI)
I/O Serial Data (I2C)
O Serial Data Transmit (UART)
I Test Clock. Test clock input in OCDS Mode.
I/O Bit 4 of Port 2. General-purpose input/output pin with internal pull-up resistor.
I/O TIMER2 Compare/Capture Channel 0
I TIMER0 External Input
I TIMER2 External Input
I/O Bit 5 of Port 2. General-purpose input/output pin with internal pull-up resistor.
I/O TIMER2 Compare/Capture Channel 1
I TIMER1 External Input
I TIMER2 External Trigger
I/O Bit 6 of Port 2. General-purpose input/output pin with internal pull-up resistor.
I/O TIMER2 Compare/Capture Channel 2
I TIMER2 External Input
I TIMER0 External Input
I System Reset. Hardware reset input, active HIGH.
AI
Analog Input. 10-bit ADC input (middle sampling rate). The ADC result stores in VCL and
VCH registers (2Ch, 2Dh) of MSFR.
AI
Analog Input. 10-bit ADC input (middle sampling rate). The ADC result stores in VBL and
VBH registers (2Ah, 2Bh) of MSFR.
AI
Analog Input. 10-bit ADC input (middle sampling rate). The ADC result stores in VAL and
VAH registers (28h, 29h) of MSFR.
AI
Analog Input. 10-bit ADC input (low sampling rate).The ADC result stores in ADC3L and
ADC3H registers (36h, 37h) of MSFR.
AO Analog Output. 8-bit DAC output set by DAC3 register (47h) of MSFR.
P Analog Ground
AI
Analog Input. 10-bit ADC input (low sampling rate). The ADC result stores in ADC0L and
ADC0H registers (30h, 31h) of MSFR.
AI
Phase C Current Input. 10-bit ADC input (high sampling rate). The ADC result stores in
ICL and ICH registers (24h, 25h) of MSFR.
Continued on the following page…
© 2012 Fairchild Semiconductor Corporation
FCM8531 • Rev. 1.0.2
5
www.fairchildsemi.com
5 Page 
Typical Performance Characteristics
0mA
10mA
Figure 9. System Frequency (fSYS) vs. Temperature
Figure 10. V25 Output Voltage (VOUT) vs.
Temperature
Figure 11. VDD Operation Current (IDD_OPPER)
vs. Temperature
Figure 12. Current Source of IA/IB/IC (IBIAS) vs.
Temperature
© 2012 Fairchild Semiconductor Corporation
FCM8531 • Rev. 1.0.2
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet FCM8531.PDF ] | |
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