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PDF TSL2581 Data sheet ( Hoja de datos )
| Número de pieza | TSL2581 | |
| Descripción | LIGHT-TO-DIGITAL CONVERTER | |
| Fabricantes | TAOS | |
| Logotipo |  |
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Features
D Approximately 30y More Sensitive Than the
TSL2560/61 Device
D Approximates Human Eye Response
D Programmable ALS Interrupt Function with
User-Defined Upper and Lower Threshold
Settings
D 16-Bit Digital Output with SMBus (TSL2580)
at 100 kHz or I2C (TSL2581) Fast-Mode at
400 kHz
D Programmable Analog Gain and Integration
Time Supporting 1,000,000-to-1 Dynamic
Range
D Available in Ultra-Small 1.25 mm y 1.75 mm
Chipscale Package
D Automatically Rejects 50/60-Hz Lighting
Ripple
D Low Quiescent Current 3 mA in Power
Down Mode
D RoHS Compliant
TSL2580, TSL2581
LIGHT-TO-DIGITAL CONVERTER
TAOS098 − MARCH 2010
PACKAGE CS
6-LEAD CHIPSCALE
(TOP VIEW)
Vdd 1
ADDR SEL 2
GND 3
6 SDA
5 INT
4 SCL
Package Drawings are Not to Scale
PACKAGE FN
DUAL FLAT NO-LEAD
(TOP VIEW)
Vdd 1
ADDR SEL 2
GND 3
6 SDA
5 INT
4 SCL
Applications
D Ambient Light Sensor (ALS) for Smart
Phones, Digital Photo Frames, and Portable
Navigation Systems
D ALS for LED Signs, Laptop Computers, and
LCD TVs
Description
The TSL2580 and TSL2581 are very-high sensitivity light-to-digital converters that transform light intensity to
a digital signal output capable of direct I2C (TSL2581) or SMBus (TSL2580) interface. Each device combines
one broadband photodiode (visible plus infrared) and one infrared-responding photodiode on a single CMOS
integrated circuit capable of providing a near-photopic response over an effective 16-bit dynamic range (16-bit
resolution). Two integrating ADCs convert the photodiode currents to a digital output that represents the
irradiance measured on each channel. This digital output can be input to a microprocessor where illuminance
(ambient light level) in lux is derived using an empirical formula to approximate the human eye response. The
TSL2580 device permits an SMB-Alert style interrupt, and the TSL2581 device supports a traditional level style
interrupt that remains asserted until the firmware clears it.
While useful for general purpose light sensing applications, the TSL2580/81 devices are designed particularly
for display panels (LCD, OLED, etc.) with the purpose of extending battery life and providing optimum viewing
in diverse lighting conditions. Display panel backlighting, which can account for up to 30 to 40 percent of total
platform power, can be automatically managed. Both devices are also ideal for controlling keyboard illumination
based upon ambient lighting conditions. Illuminance information can further be used to manage exposure
control in digital cameras. The TSL2580/81 devices are ideal in notebook/tablet PCs, LCD monitors, flat-panel
televisions, cell phones, and digital cameras. In addition, other applications include street light control, security
lighting, sunlight harvesting, machine vision, and automotive instrumentation clusters.
The LUMENOLOGY r Company
r
Texas Advanced Optoelectronic Solutions Inc.
1001 Klein Road S Suite 300 S Plano, TX 75074 S (972r) 673-0759
www.taosinc.com
Copyright E 2010, TAOS Inc.
1
1 page  
TSL2580, TSL2581
LIGHT-TO-DIGITAL CONVERTER
AC Electrical Characteristics, VDD = 3 V, TA = 255C (unless otherwise noted)
PARAMETER†
TEST CONDITIONS
MIN
t(CONV)
f(SCL)
Conversion time
Clock frequency (I2C only)
Clock frequency (SMBus only)
2.7
0
10
t(BUF)
Bus free time between start and stop condition
1.3
t(HDSTA)
Hold time after (repeated) start condition. After
this period, the first clock is generated.
0.6
t(SUSTA)
Repeated start condition setup time
t(SUSTO)
Stop condition setup time
t(HDDAT)
Data hold time
t(SUDAT)
Data setup time
t(LOW)
SCL clock low period
t(HIGH)
SCL clock high period
t(TIMEOUT) Detect clock/data low timeout (SMBus only)
tF Clock/data fall time
tR Clock/data rise time
Ci Input pin capacitance
† Specified by design and characterization; not production tested.
0.6
0.6
0
100
1.3
0.6
25
TAOS098 − MARCH 2010
TYP MAX UNIT
688 ms
400 kHz
100 kHz
μs
μs
μs
μs
0.9 μs
ns
μs
μs
35 ms
300 ns
300 ns
10 pF
The LUMENOLOGY r Company
r
www.taosinc.com
r
Copyright E 2010, TAOS Inc.
5
5 Page 
TSL2580, TSL2581
LIGHT-TO-DIGITAL CONVERTER
1 7 11
S Slave Address Wr A
8
Command Code
1
A
8
Byte Count = N
1
A
8
Data Byte 1
TAOS098 − MARCH 2010
1
A ...
8
Data Byte 2
1
A ...
8
Data Byte N
11
AP
Figure 13. SMBus Block Write or I2C Write Protocols
NOTE: The I2C write protocol does not use the Byte Count packet, and the Master will continue sending Data Bytes until the Master initiates a
Stop condition. See the Command Register on page 12 for additional information regarding the Block Read/Write protocol.
1 7 11
S Slave Address Wr A
8
Command Code
11 7 11
A Sr Slave Address Rd A
8
Byte Count = N
1
A ...
8
Data Byte 1
1
A
8
Data Byte 2
1
A ...
8
Data Byte N
11
AP
1
Figure 14. SMBus Block Read or I2C Read (Combined Format) Protocols
NOTE: The I2C read protocol does not use the Byte Count packet, and the Master will continue receiving Data Bytes until the Master initiates
a Stop Condition. See the Command Register on page 13 for additional information regarding the Block Read/Write protocol.
Register Set
The TSL258x is controlled and monitored by sixteen registers and a command register accessed through the
serial interface. These registers provide for a variety of control functions and can be read to determine results
of the ADC conversions. The register set is summarized in Table 2.
Table 2. Register Address
ADDRESS
−−
00h
01h
02h
03h
04h
05h
06h
07h
12h
13h
14h
15h
16h
17h
18h
19h
RESISTER NAME
COMMAND
CONTROL
TIMING
INTERRUPT
THLLOW
THLHIGH
THLLOW
THLHIGH
ANALOG
ID
CONSTANT
DATA0LOW
DATA0HIGH
DATA1LOW
DATA1HIGH
TIMERLOW
TIMERHIGH
REGISTER FUNCTION
Specifies register address
Control of basic functions
Integration time/gain control
Interrupt control
Low byte of low interrupt threshold
High byte of low interrupt threshold
Low byte of high interrupt threshold
High byte of high interrupt threshold
Analog control register
Part number / Rev ID
Number 4 (for SMBus block reads)
ADC channel 0 LOW data register
ADC channel 0 HIGH data register
ADC channel 1 LOW data register
ADC channel 1 HIGH data register
Manual integration timer LOW register
Manual integration timer HIGH register
R/W
W
R/W
R
The mechanics of accessing a specific register depends on the specific SMB protocol used. See the section
on SMBus protocols, above. In general, the COMMAND register is written first to specify the specific
control/status register for following read/write operations.
The LUMENOLOGY r Company
r
Copyright E 2010, TAOS Inc.
www.taosinc.com
r
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TSL2581.PDF ] | |
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