3938 Datasheet PDF - Allegro MicroSystems
| Part Number | 3938 | |
| Description | THREE PHASE POWER MOSFET CONTROLLER | |
| Manufacturers | Allegro MicroSystems | |
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3938
PRELIMINARY DATASHEET - 11/07/02
(Subject to change without notice)
THREE PHASE POWER
MOSFET CONTROLLER
ABSOLUTE MAXIMUM RATINGS
( at TA = +25°C )
Load Supply Voltage, VBB............................ 50 V
VREG (Transient) ......................................... 15 V
Logic Input Voltage Range,
VIN................... -0.3 V to VLCAP + 0.3 V
Sense Voltage, VSENSE .........................-5 to 1.5 V
Pins SA/SB/SC, ....................................-5 to 50 V
Pins GHA/GHB/GHC ................ -5 to VBB + 17 V
Pins CA/CB/CC .........................SA/SB/SC+17 V
Operating Temperature Range,
TA ................................ -20°C to +85°C
Junction Temperature, TJ ......................... +150°C
Storage Temperature Range,
TS .............................. -55°C to +150°C
Thermal Impedances, typ. (TA = +25°C)*
A3938SEQ, RØJA ..................................... 37 °C/W
A3938KLQ, RØJA..................................... 44 °C/W
* JEDEC High K board.
The A3938 is a three-phase, brushless, DC-motor controller. The
A3938’s high current gate drive capability allows driving of a wide range of
power MOSFETs and can support motor supply voltages to 50V. The A3938
integrates a bootstrapped high side driver to minimize the external
component count required to drive N-channel MOSFET drivers.
Internal, fixed, off-time, PWM, current-control circuitry can be
used to regulate the maximum load current to a desired value. The peak load
current limit is set by the user’s selection of an input reference voltage and
external sensing resistor. A user-selected external RC timing network sets the
fixed off-time pulse duration. For added flexibility, the PWM input can
provide speed/torque control where the internal current control circuit sets a
limit on the maximum current.
The A3938 includes Synchronous Rectification. This feature shorts
out the current path through the power MOSFET’s reverse body diodes
during PWM off cycle current decay. This can minimize power dissipation in
the MOSFETs, eliminate the need for external power clamp diodes, and
potentially allow a more economical choice for the MOSFET drivers.
The A3938 provides commutation logic for Hall sensors configured
for 120-degree spacing. The Hall input pins are pulled up to an internally
generated 5V reference. Power MOSFET protection features includes
bootstrap capacitor charging current monitor, regulator under-voltage
monitor, motor lead short-to-ground, and thermal shutdown.
The A3938 is available in a choice of two packages: a 32-pin,
rectangular PLCC suffix “EQ”; and 36-pin, QSOP, suffix “LQ”.
FEATURES
T Drives Wide Range of N-channel
MOSFETs
T Low-Side Synchronous Rectification
T Power MOSFET Protection
T Adjustable Dead-Time for Cross-
Conduction Protection
T Selectable coast or dynamic brake on
power-down or RESET input
T Fast/Slow Current Decay Modes
T Internal PWM Current Control
T Motor Lead Short-to-Ground
Protection
T Internal 5V Regulator
T Fault Diagnostic Output
T Thermal Shutdown
T Under-voltage Protection
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3938 Three Phase MOSFET Controller
Pin Descriptions
RESET. A logic input that enables the device. Has internal
50K pull-up to LCAP. RESET=1 will coast or brake the
motor depending on the state of the BRKSEL pin. RESET=0
will enable gate drive to follow commutation logic. RESET
= 1 will override the BRAKE pin.
GLC/GLB/GLA. Low-side gate drive outputs for
external MOSFET drivers. External series gate resistors can
be used to control slew rate seen at the power driver gate,
thereby, controlling the di/dt and dv/dt of S outputs.
SC/SB/SA. Directly connected to the motor terminals,
these pins sense the voltages switched across the load. The
pins are also connected to the negative side of the bootstrap
capacitors and the negative supply connections for the
floating high-side drivers.
GHC/GHB/GHA. High-side gate drive outputs for N-
channel MOSFET drivers. External series gate resistors can
be used to control slew rate seen at the power driver gate,
thereby, controlling the di/dt and dv/dt of S outputs.
CC/CB/CA. High-side connections for bootstrap
capacitors, positive supply for high-side gate drivers. The
bootstrap capacitors are charged to approximately VREG
when the output Sx terminals go low. When the output
swings high, the voltage on these pins rise with the outputs to
provide the boosted gate voltages needed for N-channel
power MOSFETs.
FAULT. Open collector output to indicate fault condition.
Will be pulled HIGH (usually by 5.1K external pull-up) for
any of the following fault conditions:
1) Invalid HALL input code.
2) Under-voltage condition detected at VREG.
3) Thermal Shutdown.
4) Motor lead (SA/SB/SC) connected to ground.
Faults will force a COAST condition that turns all power
MOSFETs off except a “Short-to-Ground” Fault that only
turns off the high-side drivers. Only the “Short-to-Ground”
Fault is latched but is cleared at each commutation. If the
motor has stalled due to a short to ground being detected,
toggling the RESET pin or repeating a power-up sequence
will clear the fault.
BRAKE. Logic input for braking function. BRAKE=1 will
turn on sink-side MOSFETs, turn off the source-side
MOSFETs. This will effectively short the BEMF in the
windings and brake the motor. Internal, 50K pull-up to
LCAP. RESET=1 overrides this BRAKE pin. See BRKSEL.
BRKCAP. This pin is for connection of the reservoir
capacitor used to provide positive power supply for the sink
drive outputs for a power down condition. This will allow
predictable braking, if desired. A 4.7µF capacitor will
provide 6.5V gate drive for 300ms. If power down braking
option is not needed (i.e., BRKSEL=0) then this pin should
be tied to VREG.
MODE. Logic input to set current decay method. In
response to PWM Off command: Slow Decay Mode
(MODE=1) switches off the high-side FET, Fast Decay
Mode (MODE=0) switches off the high-side and low-side
FETs. Has internal, 50K pull-up to LCAP.
H1/H2/H3. Hall sensor inputs with internal, 50K pull-ups
to LCAP. Configured for 120-degree electrical spacing.
DIR. Logic input to reverse rotation, see Commutation
Logic Table. Has internal, 50K pull-up to LCAP.
BRKSEL. Logic input to enable/disable braking upon
power down condition or RESET =1. Internal, 50K pull-up
to LCAP. BRKSEL: 0 = Coast, 1 = Brake.
PWM. Speed control input. PWM=1 will turn on
MOSFETs selected by Hall input logic. PWM=0 turns off
the selected MOSFETs. The PWM input held high to utilize
internal current control circuitry. Internal, 50K pull- up to
LCAP.
RC. Analog input. Connection for RT and CT to set the fixed
off-time. The CT will also set the BLANK time. (see
Applications Information). It is recommended that the fixed
off-time should not be less than 10 uS. The resistor should be
in the range 10K to 500K.
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| Information | Total 10 Pages | |
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