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1Gb DDR3 SDRAM A-Die

NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP

Feature

 1.5V ± 0.075V (JEDEC Standard Power Supply)

 8 Internal memory banks (BA0- BA2)

 Differential clock input (CK, )

 Programmable  Latency: 5, 6, 7, 8, 9

 Programmable Additive Latency: 0, CL-1, CL-2

 Programmable Sequential / Interleave Burst Type

 Programmable Burst Length: 4, 8

 8 bit prefetch architecture

 Output Driver Impedance Control

 Write Leveling

 OCD Calibration

 Dynamic ODT (Rtt_Nom & Rtt_WR)

 Auto Self-Refresh

 Self-Refresh Temperature

 Partial Array Self-Refresh

 RoHS Compliance

 Packages:

78-Ball BGA for x4 & x8 components

96-Ball BGA for x16 components

Description

The 1Gb Double-Data-Rate-3 (DDR3) DRAMs is a high-speed CMOS Double Data Rate32 SDRAM containing 1,073,741,824 bits. It is

internally configured as an octal-bank DRAM.

The 1Gb chip is organized as 32Mbit x 4 I/O x 8, 16Mbit x 8 I/O x 8 bank or 8Mbit x 16 I/O x 8 bank device. These synchronous devices

achieve high speed double-data-rate transfer rates of up to 1600 Mb/sec/pin for general applications.

The chip is designed to comply with all key DDR3 DRAM key features and all of the control and address inputs are synchronized with a

pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and  falling). All

I/Os are synchronized with a single ended DQS or differential DQS pair in a source synchronous fashion.

These devices operate with a single 1.5V ± 0.75V power supply and are available in BGA packages.

REV 1.2

01 / 2009

1

1Gb DDR3 SDRAM A-Die

NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP

Pin Configuration – 96 balls BGA Package (x16)

1

VDDQ

VSSQ

VDDQ

VSSQ

VSS

VDDQ

VSSQ

VREFDQ

NC

ODT

NC

VSS

VDD

VSS

VDD

VSS

< TOP View>

See the balls through the package

2

DQU5

VDD

DQU3

VDDQ

VSSQ

DQL2

DQL6



VSS

VDD



BA0

A3

A5

A7



3

DQU7

VSS

DQU1

DMU

DQL0

DQSL



DQL4







BA2

A0

A2

A9

NC

x 16

A

7

DQU4

B 

C DQSU

D DQU0

E DML

F DQL1

G VDD

H DQL7

J CK

K 

L A10/AP

M NC

N A12

P A1

R A11

T NC

8

VDDQ

DQU6

DQU2

VSSQ

VSSQ

DQL3

VSS

DQL5

VSS

VDD

ZQ

VREFCA

BA1

A4

A6

A8

9

VSS

VSSQ

VDDQ

VDD

VDDQ

VSSQ

VSSQ

VDDQ

NC

CKE

NC

VSS

VDD

VSS

VDD

VSS

REV 1.2

01 / 2009

4

1Gb DDR3 SDRAM A-Die

NT5CB256M4AN / NT5CB128M8AN / NT5CB64M16AP

Ordering Information

Green

Organization

256M x 4

128M x 8

64M x 16

Part Number

NT5CB256M4AN-AC

NT5CB256M4AN-AD

NT5CB256M4AN-BE

NT5CB256M4AN-BF

NT5CB256M4AN-CF

NT5CB256M4AN-CG

NT5CB256M4AN-DG

NT5CB256M4AN-DH

NT5CB128M8AN-AC

NT5CB128M8AN-AD

NT5CB128M8AN-BE

NT5CB128M8AN-BF

NT5CB128M8AN-CF

NT5CB128M8AN-CG

NT5CB128M8AN-DG

NT5CB128M8AN-DH

NT5CB64M16AP-AC

NT5CB64M16AP-AD

NT5CB64M16AP-BE

NT5CB64M16AP-BF

NT5CB64M16AP-CF

NT5CB64M16AP-CG

NT5CB64M16AP-DG

NT5CB64M16AP-DH

Speed

Package

Clock

Data Rate (Mb/s)

(Mbp/s)

400 DDR3-800

400 DDR3-800

533 DDR3-1066

533 DDR3-1066

667 DDR3-1333

667 DDR3-1333

78-Ball wBGA

0.8mmx0.8mm

Pitch

800

800

400

400

DDR3-1600

DDR3-1600

DDR3-800

DDR3-800

533 DDR3-1066

533 DDR3-1066

667 DDR3-1333

667 DDR3-1333

800 DDR3-1600

800 DDR3-1600

400 DDR3-800

400 DDR3-800

96-Ball wBGA

0.8mmx0.8mm

Pitch

533

533

667

667

DDR3-1066

DDR3-1066

DDR3-1333

DDR3-1333

800 DDR3-1600

800 DDR3-1600

CL-TRCD-TRP

5-5-5

6-6-6

7-7-7

8-8-8

8-8-8

9-9-9

9-9-9

10-10-10

5-5-5

6-6-6

7-7-7

8-8-8

8-8-8

9-9-9

9-9-9

10-10-10

5-5-5

6-6-6

7-7-7

8-8-8

8-8-8

9-9-9

9-9-9

10-10-10

REV 1.2

01 / 2009

7

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