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PDF DTC303T3G Data sheet ( Hoja de datos )

Número de pieza DTC303T3G
Descripción Bias Resistor Transistors
Fabricantes First Silicon 
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No Preview Available ! DTC303T3G Hoja de datos, Descripción, Manual

SEMICONDUCTOR
TECHNICAL DATA
DTC301~311 / DTC317
DTC322~323
Bias Resistor Transistors
NPN Silicon Surface Mount Transistor
with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single
device and its external resistor bias network. The BRT (Bias Resistor
Transistor) contains a single transistor with a monolithic bias network
consisting of two resistors; a series base resistor and a base-emitter
resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space. The device is housed in the SC-70 /
SOT-323 package which is designed for low power surface mount
applications.
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
DEVICE MARKING INFORMATION
See specific marking information in the device marking table on
page 2 of this data sheet.
MAXIMUM RATINGS (TA = 25 C unless otherwise noted)
Rating
Symbol
Value
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
VCBO
VCEO
IC
50
50
100
Unit
Vdc
Vdc
mAdc
THERMAL CHARACTERISTICS
Characteristic
Symbol
Total Device Dissipation
TA = 25 C
Derate above 25 C
PD
Thermal Resistance –
Junction-to-Ambient
Thermal Resistance –
Junction-to-Lead
Junction and Storage
Temperature Range
1. FR–4 @ Minimum Pad
2. FR–4 @ 1.0 x 1.0 inch Pad
RθJA
RθJL
TJ , Tstg
Max
202 (Note 1.)
310 (Note 2.)
1.6 (Note 1.)
2.5 (Note 2.)
618 (Note 1.)
403 (Note 2.)
280 (Note 1.)
332 (Note 2.)
–55 to +150
Unit
mW
mW/ C
C/W
C/W
C
3
2
1
SC-70 / SOT-323
PIN 1
BASE
(INPUT)
R1
R2
PIN 3
COLLECTOR
(OUTPUT)
PIN 2
EMITTER
(GROUND)
2008. 03. 10
Revision No : 0
1/10

1 page




DTC303T3G pdf
DTC301~DTC311 / DTC317 / DTC322~DTC323
TYPICAL ELECTRICAL CHARACTERISTICS – DTC302
Figure 2. VCE(sat) versus I C
Figure 3. DC Current Gain
Figure 4. Output Capacitance
Figure 5. Output Current versus Input Voltage
2008. 03. 10
Figure 6. Input Voltage versus Output Current
Revision No : 0
5/10

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