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PDF CXA3796N Data sheet ( Hoja de datos )
| Número de pieza | CXA3796N | |
| Descripción | Digital CCD Camera Head Amplifier | |
| Fabricantes | Sony | |
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Digital CCD Camera Head Amplifier
CXA3796N
Description
The CXA3796N is a bipolar IC developed as a head amplifier for digital CCD cameras. This IC provides the
following functions: correlated double sampling, AGC for the CCD signal, A/D sample and hold, blanking, A/D
reference voltage, and an output driver.
(Applications: CCD cameras)
Features
High sensitivity made possible by a high-gain AGC amplifier
Blanking function provided for the purpose of calibrating the CCD output signal black level
Regulator output pin provided for A/D converter reference voltage
Built-in sample-and-hold circuits for camera signals required by external A/D converters
<Changes and improvements from CXA2096N>
Selectable maximum gain of AGC amplifier (MAXGAIN mode)
Minus gain setting of AGC amplifier (GAINSHIFT mode)
CCDLEVEL output blanking function
Input dynamic range expansion
Noise characteristics improvement
Package
24-pin SSOP (Plastic)
Structure
Bipolar silicon monolithic IC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license
by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating
the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E07Z39-CR
1 page  
CXA3796N
Pin
No.
Symbol
I/O
Pin voltage
Equivalent circuit
Description
7 VRB
100
16.5k
O 1.485V (0.45VCC) 1.485V 300
13.5k
1k
200
300
1.3k
110µA 4k
12
1.485V regulator output.
Be sure to decouple this
pin near the IC pins to
7 prevent the oscillation
and external noise when
this pin is not used.
(Recommended
capacitor value: 4.7μF)
8 VRT
6.5k
O
2.585V (0.783VCC)
300
2.58V
23.5k
55µ
2.585V regulator output.
1k 16k 12
300
200
55µ 220µ
Be sure to decouple this
pin near the IC pins to
8 prevent the oscillation
and external noise when
this pin is not used.
(Recommended
capacitor value: 4.7μF)
9 OFFSET
50k 1k 50k 1k 200
I 1.65 to 3.3V & 0V 1.5k
60k
1.65V
3k
24k 60k
55µA
1k
55µA 55µA
2k
Controls the output offset.
2k
VRB When 3.3V: VRB + 0mV
When 1.65V: VRB + 110mV
When 0V (preset mode):
VRB + 40mV
9
10 PBLK
Camera signal
VTH = 1.65V
60k
60k
1k
preblanking pulse input.
Active when Low.
I
1.65V
2k Calibrates the black level
10 of the AGC output
Active: Low
waveform.
60k When PBLK is Low, the
27.5µA
DRVOUT potential is
forced to VRB.
11 XRS
VTH = 0.74V
50µA
440µA
1k
I
Sampling
24k
0.74V
7k
145
11
Camera signal sample-
and-hold pulse input.
1k
98µA
-5-
5 Page 
CXA3796N
Measurement Timing Chart
PL4 (CLPOB)
PL1 (CLPDM)
2µs
2µs
PL6 (PBLK)
1H
V2 (DIN)
Equivalent to CCD signal black level
PL2 (SHD)
PL3 (SHP)
PL5 (XRS)
1H
1H
Different for each test
2.5V
GND
2.5V
GND
2.5V
GND
2.5V
GND
- 11 -
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet CXA3796N.PDF ] | |
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