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TC1164 데이터시트 PDF




Infineon에서 제조한 전자 부품 TC1164은 전자 산업 및 응용 분야에서
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기능 32-Bit Single-Chip Microcontroller
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TC1164 데이터시트, 핀배열, 회로
Data Sheet, V1.0, Apr. 2008
TC1163/TC1164
32-Bit Single-Chip Microcontroller
TriCore
Microcontrollers




TC1164 pdf, 반도체, 판매, 대치품
TC1163/TC1164
Preliminary
TC1163/TC1164 Data Sheet
Revision History: V1.0, 2008-04
Previous Version: V0.3 2007-03
Page
Subjects (major changes since last revision)
7 VSSOSC3 is deleted from the TC1163/TC1164 Logic Symbol.
8, 10
TDATA0 of Pin 17, TCLK0 of Pin 20, TCLK0 of Pin 74 and TDATA0 of Pin
77 are updated in the Pinning Diagram and Pin Definition and Functions
Table.
53 Transmit DMA request in Block Diagram of ASC Interfaces is updated.
55 Alternate output functions in block diagram of SSC interfaces are updated.
61 Programmable baud rate of the MLI is updated.
62 TDATA0 and TCLK0 of the block diagram of MLI interfaces are updated.
74 The description for WDT double reset detection is updated.
111 The power sequencing details is updated.
122 MLI timing, maximum operating frequency limit is extended, t31 is added.
126 Thermal resistance junction leads is updated.
Trademarks
TriCore® is a trademark of Infineon Technologies AG.
We Listen to Your Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
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Data Sheet
V1.0, 2008-04

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TC1164 전자부품, 판매, 대치품
TC1163/TC1164
Preliminary
Summary of Features
1 Summary of Features
The TC1163/TC1164 has the following features:
• High-performance 32-bit super-scaler TriCore v1.3 CPU with 4-stage pipeline
– Superior real-time performance
– Strong bit handling
– Fully integrated DSP capabilities
– Single precision Floating Point Unit (FPU)
– 80 MHz operation at full temperature range
• Peripheral Control Processor with single cycle instruction (PCP2)
– 8 Kbyte Parameter Memory (PRAM)
– 12 Kbyte Code Memory (CMEM)
• Multiple on-chip memories
– 40 Kbyte Local Data Memory (SRAM)
– 8 Kbyte Overlay Memory
– 8 Kbyte Scratch-Pad RAM (SPRAM)
– 8 Kbyte Instruction Cache (ICACHE)
– 1024 Kbyte Program Flash (for instruction code and constant data)
– 16 Kbyte Data Flash (e.g. 2 Kbyte EEPROM emulation)
– 16 Kbyte Boot ROM
• 8-channel DMA Controller
• Fast-response interrupt system with 2 x 255 hardware priority arbitration levels
serviced by CPU or PCP2
• High-performance on-chip bus structure
– 64-bit Local Memory Bus (LMB) to Flash memory
– System Peripheral Bus (SPB) for interconnections of functional units
• Versatile on-chip Peripheral Units
– Two Asynchronous/Synchronous Serial Channels (ASCs) with baudrate
generator, parity, framing and overrun error detection
– Two High Speed Synchronous Serial Channels (SSCs) with programmable data
length and shift direction
– One Micro Second Bus (MSC) interface for serial port expansion to external power
devices
– One high-speed Micro Link Interface (MLI) for serial inter-processor
communication
– One MultiCAN Module with two CAN nodes and 64 free assignable message
objects for high efficiency data handling via FIFO buffering and gateway data
transfer1)
1) Not applicable to TC1163
Data Sheet
3
V1.0, 2008-04

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일반 IC 문의 : 샘플 및 소량 구매
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관련 데이터시트

부품번호상세설명 및 기능제조사
TC1163

32-Bit Single-Chip Microcontroller

Infineon
Infineon
TC1164

32-Bit Single-Chip Microcontroller

Infineon
Infineon

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