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MMA5148AKWR2 데이터시트 PDF




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부품번호 MMA5148AKWR2 기능
기능 PSI5 Inertial Sensor
제조업체 Freescale Semiconductor
로고 Freescale Semiconductor 로고


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MMA5148AKWR2 데이터시트, 핀배열, 회로
Freescale Semiconductor
Data Sheet: Technical Data
Document Number: MMA51xxAKW
Rev. 0, 09/2012
Xtrinsic MMA51xxAKW
PSI5 Inertial Sensor
The MMA51xxAKW family, a SafeAssure solution, includes the PSI5 Version 1.3
asynchronous mode compatible overdamped Z-axis satellite accelerometer.
Features
• ±60g to ±480g Full-Scale Range
• 400 Hz, 3-Pole Low-Pass Filter
• Single Pole, High-Pass Filter with Fast Startup and Output Rate Limiting
• PSI5 Version 1.3 Asynchronous Mode Compatible
– PSI5-A10P-228/1L Compatible
– Baud Rate: 125 kBaud
– 10-bit Data
– Even Parity Error Detection
• 16 μs Internal Sample Rate, with Interpolation to 1 μs
• Pb-Free 16-Pin QFN, 6 by 6 Package
• Qualified AECQ100, Revision G, Grade 1 (-40°C to +125°C)
(http://www.aecouncil.com/)
Typical Applications
• Airbag Front and Side Crash Detection
Device
MMA5106AKW
MMA5112AKW
MMA5124AKW
MMA5148AKW
MMA5106AKWR2
MMA5112AKWR2
MMA5124AKWR2
MMA5148AKWR2
ORDERING INFORMATION
Axis
Range
Package
Z ±60g
2086-01
Z ±120g
2086-01
Z ±240g
2086-01
Z ±480g
2086-01
Z ±60g
2086-01
Z ±120g
2086-01
Z ±240g
2086-01
Z ±480g
2086-01
Shipping
Tubes
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
MMA51xxAKW
Bottom View
16-PIN QFN
CASE 2086-01
Top View
16 15 14 13
VCC
VSS
IDATA
VSS
1
2
3
4
17
567
12 VSSA
11 VREGA
10 CS
9 VREG
8
PIN CONNECTIONS
© 2012 Freescale Semiconductor, Inc. All rights reserved.




MMA5148AKWR2 pdf, 반도체, 판매, 대치품
1 Pin Connections
16 15 14 13
VCC
VSS
IDATA
VSS
1
2
3
4
17
12 VSSA
11 VREGA
10 CS
9 VREG
5678
Figure 4. Top View, 16-Pin QFN Package
Table 1. Pin Description
Pin
Pin
Name
Formal Name
Definition
1 VCC
Supply
This pin is connected to the PSI5 power and data line through a resistor and supplies power to the device. An external capac-
itor must be connected between this pin and VSS. Reference Figure 1.
2 VSS Digital GND This pin is the power supply return node for the digital circuitry.
3 IDATA
Response
Current
This pin is connected to the PSI5 power and data line through a resistor and modulates the response current for PSI5 com-
munication. Reference Figure 1.
4 VSS Digital GND This pin is the power supply return node for the digital circuitry.
5 NC Not Connected This pin must be left unconnected in the application.
6 SCLK
SPI Clock
This input pin provides the serial clock to the SPI port for test purposes. An internal pulldown device is connected to this pin.
This pin must be grounded or left unconnected in the application.
7
DOUT
SPI Data Out
This pin functions as the serial data output from the SPI port for test purposes. This pin must be left unconnected in the appli-
cation.
8
DIN
SPI Data In
This pin functions as the serial data input to the SPI port for test purposes. An internal pulldown device is connected to this
pin. This pin must be grounded or left unconnected in the application.
9 VREG
10 CS
Digital
Supply
Chip Select
This pin is connected to the power supply for the internal digital circuitry. An external capacitor must be connected between
this pin and VSS. Reference Figure 1.
This input pin provides the chip select to the SPI port for test purposes. An internal pullup device is connected to this pin.This
pin must be left unconnected in the application.
11 VREGA
12 VSSA
Analog
Supply
Analog GND
This pin is connected to the power supply for the internal analog circuitry. An external capacitor must be connected between
this pin and VSSA. Reference Figure 1.
This pin is the power supply return node for the analog circuitry.
13 VBUF
14 TEST
Power
Supply
Test Pin
This pin is connected to a buffer regulator for the internal circuitry. The buffer regulator supplies both the analog (VREGA) and
digital (VREG) supplies to provide immunity from EMC and supply dropouts on VCC. An external capacitor must be connected
between this pin and VSS. Reference Figure 1.
This pin is must be grounded or left unconnected in the application.
15 NC Not Connected This pin must be left unconnected in the application.
16 VSSA
Analog GND This pin is the power supply return node for the analog circuitry.
17 PAD Die Attach Pad This pin is the die attach flag, and is internally connected to VSS.
Corner
Pads
Corner Pads The corner pads are internally connected to VSS.
MMA51xxAKW
4
Sensors
Freescale Semiconductor, Inc.

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MMA5148AKWR2 전자부품, 판매, 대치품
2.4 Electrical Characteristics - Sensor and Signal Chain
VL (VCC - VSS) VH, TL TA TH, ΔT 25 K/min, unless otherwise specified.
# Characteristic
Symbol
Min
Typ
Max Units
Sensitivity (10-bit output @ 100 Hz, referenced to 0 Hz)
43 ±60g Range
44 ±120g Range
45 ±240g Range
46 ±480g Range
Total Sensitivity Error (including non-linearity)
47 TA = 25°C, ±240g
48 TL TA TH, ±240g
49 TL TA TH, ±240g, VVCC_UV_F VCC VL
50 TA = 25°C, > ±240g
51 TL TA TH, > ±240g
52 TL TA TH, > ±240g, VVCC_UV_F VCC VL
* SENS
8
— LSB/g (1)
* SENS
4
— LSB/g (1)
* SENS
2
— LSB/g (1)
* SENS
1
— LSB/g (1)
* ΔSENS_240
-5
+5 % (1)
* ΔSENS_240
-7
+7 % (1)
ΔSENS_240
-7
+7 % (9)
* ΔSENS_480
-5
+5 % (1)
* ΔSENS_480
-7
+7 % (1)
ΔSENS_480
-7
+7 % (9)
Digital Offset Before Offset Cancellation
53 10-bit
54 10-bit, TL TA TH, VVCC_UV_F VCC VL
Digital Offset After Offset Cancellation
55 10-bit, 0.3 Hz HPF or 0.1 Hz HPF
56 10-bit, 0.04 Hz HPF
Continuous Offset Monitor Limit
57 10-bit output, before compensation
Range of Output (10-Bit Mode)
58 Acceleration
*
OFF10Bit
OFF10Bit
-52
-52
0
0
+52 LSB (1)
+52 LSB (9)
* OFF10Bit
-1
0
+1 LSB (1)
* OFF10Bit
-2
0
+2 LSB (9)
OFFMON
-66
+66 LSB (3)
RANGE
-480
+480
LSB (3)
Cross-Axis Sensitivity
59 X-axis to Z-Axis
60 Y-axis to Z-Axis
* VXZ
* VYZ
-5 +5 % (3)
-5 +5 % (3)
61 System Output Noise Peak (10-bit Mode, 1 Hz - 1 kHz, All Ranges)
*
nPeak
-4
+4 LSB (3)
62 System Output Noise RMS (10-bit mode, 1 Hz - 1 kHz, All Ranges)
*
nRMS
+1.0
LSB (3)
Non-linearity
63 10-bit output, ≤ ±240g
64 10-bit output, > ±240g
NLOUT_240g
-2
+2 % (3)
NLOUT_480g
-2
+2 % (3)
Sensors
Freescale Semiconductor, Inc.
MMA51xxAKW
7

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MMA5148AKWR2

PSI5 Inertial Sensor

Freescale Semiconductor
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